1f126890aSEmmanuel Vadot// SPDX-License-Identifier: GPL-2.0 2f126890aSEmmanuel Vadot/* 3f126890aSEmmanuel Vadot * This dts file supports Dalmore A04. 4f126890aSEmmanuel Vadot * Other board revisions are not supported 5f126890aSEmmanuel Vadot */ 6f126890aSEmmanuel Vadot 7f126890aSEmmanuel Vadot/dts-v1/; 8f126890aSEmmanuel Vadot 9f126890aSEmmanuel Vadot#include <dt-bindings/input/input.h> 10f126890aSEmmanuel Vadot#include "tegra114.dtsi" 11f126890aSEmmanuel Vadot 12f126890aSEmmanuel Vadot/ { 13f126890aSEmmanuel Vadot model = "NVIDIA Tegra114 Dalmore evaluation board"; 14f126890aSEmmanuel Vadot compatible = "nvidia,dalmore", "nvidia,tegra114"; 15f126890aSEmmanuel Vadot 16f126890aSEmmanuel Vadot aliases { 17f126890aSEmmanuel Vadot rtc0 = "/i2c@7000d000/tps65913@58"; 18f126890aSEmmanuel Vadot rtc1 = "/rtc@7000e000"; 19f126890aSEmmanuel Vadot serial0 = &uartd; 20f126890aSEmmanuel Vadot }; 21f126890aSEmmanuel Vadot 22f126890aSEmmanuel Vadot chosen { 23f126890aSEmmanuel Vadot stdout-path = "serial0:115200n8"; 24f126890aSEmmanuel Vadot }; 25f126890aSEmmanuel Vadot 26f126890aSEmmanuel Vadot memory@80000000 { 27f126890aSEmmanuel Vadot reg = <0x80000000 0x40000000>; 28f126890aSEmmanuel Vadot }; 29f126890aSEmmanuel Vadot 30f126890aSEmmanuel Vadot host1x@50000000 { 31f126890aSEmmanuel Vadot hdmi@54280000 { 32f126890aSEmmanuel Vadot status = "okay"; 33f126890aSEmmanuel Vadot 34f126890aSEmmanuel Vadot hdmi-supply = <&vdd_5v0_hdmi>; 35f126890aSEmmanuel Vadot vdd-supply = <&vdd_hdmi_reg>; 36f126890aSEmmanuel Vadot pll-supply = <&palmas_smps3_reg>; 37f126890aSEmmanuel Vadot 38f126890aSEmmanuel Vadot nvidia,ddc-i2c-bus = <&hdmi_ddc>; 39f126890aSEmmanuel Vadot nvidia,hpd-gpio = 40f126890aSEmmanuel Vadot <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>; 41f126890aSEmmanuel Vadot }; 42f126890aSEmmanuel Vadot 43f126890aSEmmanuel Vadot dsi@54300000 { 44f126890aSEmmanuel Vadot status = "okay"; 45f126890aSEmmanuel Vadot 46f126890aSEmmanuel Vadot avdd-dsi-csi-supply = <&avdd_1v2_reg>; 47f126890aSEmmanuel Vadot 48f126890aSEmmanuel Vadot panel@0 { 49f126890aSEmmanuel Vadot compatible = "panasonic,vvx10f004b00"; 50f126890aSEmmanuel Vadot reg = <0>; 51f126890aSEmmanuel Vadot 52f126890aSEmmanuel Vadot power-supply = <&avdd_lcd_reg>; 53f126890aSEmmanuel Vadot backlight = <&backlight>; 54f126890aSEmmanuel Vadot }; 55f126890aSEmmanuel Vadot }; 56f126890aSEmmanuel Vadot }; 57f126890aSEmmanuel Vadot 58f126890aSEmmanuel Vadot pinmux@70000868 { 59f126890aSEmmanuel Vadot pinctrl-names = "default"; 60f126890aSEmmanuel Vadot pinctrl-0 = <&state_default>; 61f126890aSEmmanuel Vadot 62f126890aSEmmanuel Vadot state_default: pinmux { 63f126890aSEmmanuel Vadot clk1_out_pw4 { 64f126890aSEmmanuel Vadot nvidia,pins = "clk1_out_pw4"; 65f126890aSEmmanuel Vadot nvidia,function = "extperiph1"; 66f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 67f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 68f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 69f126890aSEmmanuel Vadot }; 70f126890aSEmmanuel Vadot dap1_din_pn1 { 71f126890aSEmmanuel Vadot nvidia,pins = "dap1_din_pn1"; 72f126890aSEmmanuel Vadot nvidia,function = "i2s0"; 73f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 74f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 75f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 76f126890aSEmmanuel Vadot }; 77f126890aSEmmanuel Vadot dap1_dout_pn2 { 78f126890aSEmmanuel Vadot nvidia,pins = "dap1_dout_pn2", 79f126890aSEmmanuel Vadot "dap1_fs_pn0", 80f126890aSEmmanuel Vadot "dap1_sclk_pn3"; 81f126890aSEmmanuel Vadot nvidia,function = "i2s0"; 82f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 83f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 84f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 85f126890aSEmmanuel Vadot }; 86f126890aSEmmanuel Vadot dap2_din_pa4 { 87f126890aSEmmanuel Vadot nvidia,pins = "dap2_din_pa4"; 88f126890aSEmmanuel Vadot nvidia,function = "i2s1"; 89f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 90f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 91f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 92f126890aSEmmanuel Vadot }; 93f126890aSEmmanuel Vadot dap2_dout_pa5 { 94f126890aSEmmanuel Vadot nvidia,pins = "dap2_dout_pa5", 95f126890aSEmmanuel Vadot "dap2_fs_pa2", 96f126890aSEmmanuel Vadot "dap2_sclk_pa3"; 97f126890aSEmmanuel Vadot nvidia,function = "i2s1"; 98f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 99f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 100f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 101f126890aSEmmanuel Vadot }; 102f126890aSEmmanuel Vadot dap4_din_pp5 { 103f126890aSEmmanuel Vadot nvidia,pins = "dap4_din_pp5", 104f126890aSEmmanuel Vadot "dap4_dout_pp6", 105f126890aSEmmanuel Vadot "dap4_fs_pp4", 106f126890aSEmmanuel Vadot "dap4_sclk_pp7"; 107f126890aSEmmanuel Vadot nvidia,function = "i2s3"; 108f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 109f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 110f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 111f126890aSEmmanuel Vadot }; 112f126890aSEmmanuel Vadot dvfs_pwm_px0 { 113f126890aSEmmanuel Vadot nvidia,pins = "dvfs_pwm_px0", 114f126890aSEmmanuel Vadot "dvfs_clk_px2"; 115f126890aSEmmanuel Vadot nvidia,function = "cldvfs"; 116f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 117f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 118f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 119f126890aSEmmanuel Vadot }; 120f126890aSEmmanuel Vadot ulpi_clk_py0 { 121f126890aSEmmanuel Vadot nvidia,pins = "ulpi_clk_py0", 122f126890aSEmmanuel Vadot "ulpi_data0_po1", 123f126890aSEmmanuel Vadot "ulpi_data1_po2", 124f126890aSEmmanuel Vadot "ulpi_data2_po3", 125f126890aSEmmanuel Vadot "ulpi_data3_po4", 126f126890aSEmmanuel Vadot "ulpi_data4_po5", 127f126890aSEmmanuel Vadot "ulpi_data5_po6", 128f126890aSEmmanuel Vadot "ulpi_data6_po7", 129f126890aSEmmanuel Vadot "ulpi_data7_po0"; 130f126890aSEmmanuel Vadot nvidia,function = "ulpi"; 131f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 132f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 133f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 134f126890aSEmmanuel Vadot }; 135f126890aSEmmanuel Vadot ulpi_dir_py1 { 136f126890aSEmmanuel Vadot nvidia,pins = "ulpi_dir_py1", 137f126890aSEmmanuel Vadot "ulpi_nxt_py2"; 138f126890aSEmmanuel Vadot nvidia,function = "ulpi"; 139f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 140f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 141f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 142f126890aSEmmanuel Vadot }; 143f126890aSEmmanuel Vadot ulpi_stp_py3 { 144f126890aSEmmanuel Vadot nvidia,pins = "ulpi_stp_py3"; 145f126890aSEmmanuel Vadot nvidia,function = "ulpi"; 146f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 147f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 148f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 149f126890aSEmmanuel Vadot }; 150f126890aSEmmanuel Vadot cam_i2c_scl_pbb1 { 151f126890aSEmmanuel Vadot nvidia,pins = "cam_i2c_scl_pbb1", 152f126890aSEmmanuel Vadot "cam_i2c_sda_pbb2"; 153f126890aSEmmanuel Vadot nvidia,function = "i2c3"; 154f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 155f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 156f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 157f126890aSEmmanuel Vadot nvidia,lock = <TEGRA_PIN_DISABLE>; 158f126890aSEmmanuel Vadot nvidia,open-drain = <TEGRA_PIN_DISABLE>; 159f126890aSEmmanuel Vadot }; 160f126890aSEmmanuel Vadot cam_mclk_pcc0 { 161f126890aSEmmanuel Vadot nvidia,pins = "cam_mclk_pcc0", 162f126890aSEmmanuel Vadot "pbb0"; 163f126890aSEmmanuel Vadot nvidia,function = "vi_alt3"; 164f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 165f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 166f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 167f126890aSEmmanuel Vadot nvidia,lock = <TEGRA_PIN_DISABLE>; 168f126890aSEmmanuel Vadot }; 169f126890aSEmmanuel Vadot gen2_i2c_scl_pt5 { 170f126890aSEmmanuel Vadot nvidia,pins = "gen2_i2c_scl_pt5", 171f126890aSEmmanuel Vadot "gen2_i2c_sda_pt6"; 172f126890aSEmmanuel Vadot nvidia,function = "i2c2"; 173f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 174f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 175f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 176f126890aSEmmanuel Vadot nvidia,lock = <TEGRA_PIN_DISABLE>; 177f126890aSEmmanuel Vadot nvidia,open-drain = <TEGRA_PIN_DISABLE>; 178f126890aSEmmanuel Vadot }; 179f126890aSEmmanuel Vadot gmi_a16_pj7 { 180f126890aSEmmanuel Vadot nvidia,pins = "gmi_a16_pj7"; 181f126890aSEmmanuel Vadot nvidia,function = "uartd"; 182f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 183f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 184f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 185f126890aSEmmanuel Vadot }; 186f126890aSEmmanuel Vadot gmi_a17_pb0 { 187f126890aSEmmanuel Vadot nvidia,pins = "gmi_a17_pb0", 188f126890aSEmmanuel Vadot "gmi_a18_pb1"; 189f126890aSEmmanuel Vadot nvidia,function = "uartd"; 190f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 191f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 192f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 193f126890aSEmmanuel Vadot }; 194f126890aSEmmanuel Vadot gmi_a19_pk7 { 195f126890aSEmmanuel Vadot nvidia,pins = "gmi_a19_pk7"; 196f126890aSEmmanuel Vadot nvidia,function = "uartd"; 197f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 198f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 199f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 200f126890aSEmmanuel Vadot }; 201f126890aSEmmanuel Vadot gmi_ad5_pg5 { 202f126890aSEmmanuel Vadot nvidia,pins = "gmi_ad5_pg5", 203f126890aSEmmanuel Vadot "gmi_cs6_n_pi3", 204f126890aSEmmanuel Vadot "gmi_wr_n_pi0"; 205f126890aSEmmanuel Vadot nvidia,function = "spi4"; 206f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 207f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 208f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 209f126890aSEmmanuel Vadot }; 210f126890aSEmmanuel Vadot gmi_ad6_pg6 { 211f126890aSEmmanuel Vadot nvidia,pins = "gmi_ad6_pg6", 212f126890aSEmmanuel Vadot "gmi_ad7_pg7"; 213f126890aSEmmanuel Vadot nvidia,function = "spi4"; 214f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_UP>; 215f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 216f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 217f126890aSEmmanuel Vadot }; 218f126890aSEmmanuel Vadot gmi_ad12_ph4 { 219f126890aSEmmanuel Vadot nvidia,pins = "gmi_ad12_ph4"; 220f126890aSEmmanuel Vadot nvidia,function = "rsvd4"; 221f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 222f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 223f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 224f126890aSEmmanuel Vadot }; 225f126890aSEmmanuel Vadot gmi_ad9_ph1 { 226f126890aSEmmanuel Vadot nvidia,pins = "gmi_ad9_ph1"; 227f126890aSEmmanuel Vadot nvidia,function = "pwm1"; 228f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 229f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 230f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 231f126890aSEmmanuel Vadot }; 232f126890aSEmmanuel Vadot gmi_cs1_n_pj2 { 233f126890aSEmmanuel Vadot nvidia,pins = "gmi_cs1_n_pj2", 234f126890aSEmmanuel Vadot "gmi_oe_n_pi1"; 235f126890aSEmmanuel Vadot nvidia,function = "soc"; 236f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 237f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 238f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 239f126890aSEmmanuel Vadot }; 240f126890aSEmmanuel Vadot clk2_out_pw5 { 241f126890aSEmmanuel Vadot nvidia,pins = "clk2_out_pw5"; 242f126890aSEmmanuel Vadot nvidia,function = "extperiph2"; 243f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 244f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 245f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 246f126890aSEmmanuel Vadot }; 247f126890aSEmmanuel Vadot sdmmc1_clk_pz0 { 248f126890aSEmmanuel Vadot nvidia,pins = "sdmmc1_clk_pz0"; 249f126890aSEmmanuel Vadot nvidia,function = "sdmmc1"; 250f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 251f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 252f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 253f126890aSEmmanuel Vadot }; 254f126890aSEmmanuel Vadot sdmmc1_cmd_pz1 { 255f126890aSEmmanuel Vadot nvidia,pins = "sdmmc1_cmd_pz1", 256f126890aSEmmanuel Vadot "sdmmc1_dat0_py7", 257f126890aSEmmanuel Vadot "sdmmc1_dat1_py6", 258f126890aSEmmanuel Vadot "sdmmc1_dat2_py5", 259f126890aSEmmanuel Vadot "sdmmc1_dat3_py4"; 260f126890aSEmmanuel Vadot nvidia,function = "sdmmc1"; 261f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_UP>; 262f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 263f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 264f126890aSEmmanuel Vadot }; 265f126890aSEmmanuel Vadot sdmmc1_wp_n_pv3 { 266f126890aSEmmanuel Vadot nvidia,pins = "sdmmc1_wp_n_pv3"; 267f126890aSEmmanuel Vadot nvidia,function = "spi4"; 268f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_UP>; 269f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 270f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 271f126890aSEmmanuel Vadot }; 272f126890aSEmmanuel Vadot sdmmc3_clk_pa6 { 273f126890aSEmmanuel Vadot nvidia,pins = "sdmmc3_clk_pa6"; 274f126890aSEmmanuel Vadot nvidia,function = "sdmmc3"; 275f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 276f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 277f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 278f126890aSEmmanuel Vadot }; 279f126890aSEmmanuel Vadot sdmmc3_cmd_pa7 { 280f126890aSEmmanuel Vadot nvidia,pins = "sdmmc3_cmd_pa7", 281f126890aSEmmanuel Vadot "sdmmc3_dat0_pb7", 282f126890aSEmmanuel Vadot "sdmmc3_dat1_pb6", 283f126890aSEmmanuel Vadot "sdmmc3_dat2_pb5", 284f126890aSEmmanuel Vadot "sdmmc3_dat3_pb4", 285f126890aSEmmanuel Vadot "kb_col4_pq4", 286f126890aSEmmanuel Vadot "sdmmc3_clk_lb_out_pee4", 287f126890aSEmmanuel Vadot "sdmmc3_clk_lb_in_pee5"; 288f126890aSEmmanuel Vadot nvidia,function = "sdmmc3"; 289f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_UP>; 290f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 291f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 292f126890aSEmmanuel Vadot }; 293f126890aSEmmanuel Vadot sdmmc4_clk_pcc4 { 294f126890aSEmmanuel Vadot nvidia,pins = "sdmmc4_clk_pcc4"; 295f126890aSEmmanuel Vadot nvidia,function = "sdmmc4"; 296f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 297f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 298f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 299f126890aSEmmanuel Vadot }; 300f126890aSEmmanuel Vadot sdmmc4_cmd_pt7 { 301f126890aSEmmanuel Vadot nvidia,pins = "sdmmc4_cmd_pt7", 302f126890aSEmmanuel Vadot "sdmmc4_dat0_paa0", 303f126890aSEmmanuel Vadot "sdmmc4_dat1_paa1", 304f126890aSEmmanuel Vadot "sdmmc4_dat2_paa2", 305f126890aSEmmanuel Vadot "sdmmc4_dat3_paa3", 306f126890aSEmmanuel Vadot "sdmmc4_dat4_paa4", 307f126890aSEmmanuel Vadot "sdmmc4_dat5_paa5", 308f126890aSEmmanuel Vadot "sdmmc4_dat6_paa6", 309f126890aSEmmanuel Vadot "sdmmc4_dat7_paa7"; 310f126890aSEmmanuel Vadot nvidia,function = "sdmmc4"; 311f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_UP>; 312f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 313f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 314f126890aSEmmanuel Vadot }; 315f126890aSEmmanuel Vadot clk_32k_out_pa0 { 316f126890aSEmmanuel Vadot nvidia,pins = "clk_32k_out_pa0"; 317f126890aSEmmanuel Vadot nvidia,function = "blink"; 318f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 319f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 320f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 321f126890aSEmmanuel Vadot }; 322f126890aSEmmanuel Vadot kb_col0_pq0 { 323f126890aSEmmanuel Vadot nvidia,pins = "kb_col0_pq0", 324f126890aSEmmanuel Vadot "kb_col1_pq1", 325f126890aSEmmanuel Vadot "kb_col2_pq2", 326f126890aSEmmanuel Vadot "kb_row0_pr0", 327f126890aSEmmanuel Vadot "kb_row1_pr1", 328f126890aSEmmanuel Vadot "kb_row2_pr2"; 329f126890aSEmmanuel Vadot nvidia,function = "kbc"; 330f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_UP>; 331f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 332f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 333f126890aSEmmanuel Vadot }; 334f126890aSEmmanuel Vadot dap3_din_pp1 { 335f126890aSEmmanuel Vadot nvidia,pins = "dap3_din_pp1", 336f126890aSEmmanuel Vadot "dap3_sclk_pp3"; 337f126890aSEmmanuel Vadot nvidia,function = "displayb"; 338f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 339f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 340f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 341f126890aSEmmanuel Vadot }; 342f126890aSEmmanuel Vadot pv0 { 343f126890aSEmmanuel Vadot nvidia,pins = "pv0"; 344f126890aSEmmanuel Vadot nvidia,function = "rsvd4"; 345f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 346f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 347f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 348f126890aSEmmanuel Vadot }; 349f126890aSEmmanuel Vadot kb_row7_pr7 { 350f126890aSEmmanuel Vadot nvidia,pins = "kb_row7_pr7"; 351f126890aSEmmanuel Vadot nvidia,function = "rsvd2"; 352f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_UP>; 353f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 354f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 355f126890aSEmmanuel Vadot }; 356f126890aSEmmanuel Vadot kb_row10_ps2 { 357f126890aSEmmanuel Vadot nvidia,pins = "kb_row10_ps2"; 358f126890aSEmmanuel Vadot nvidia,function = "uarta"; 359f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 360f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 361f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 362f126890aSEmmanuel Vadot }; 363f126890aSEmmanuel Vadot kb_row9_ps1 { 364f126890aSEmmanuel Vadot nvidia,pins = "kb_row9_ps1"; 365f126890aSEmmanuel Vadot nvidia,function = "uarta"; 366f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 367f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 368f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 369f126890aSEmmanuel Vadot }; 370f126890aSEmmanuel Vadot pwr_i2c_scl_pz6 { 371f126890aSEmmanuel Vadot nvidia,pins = "pwr_i2c_scl_pz6", 372f126890aSEmmanuel Vadot "pwr_i2c_sda_pz7"; 373f126890aSEmmanuel Vadot nvidia,function = "i2cpwr"; 374f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 375f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 376f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 377f126890aSEmmanuel Vadot nvidia,lock = <TEGRA_PIN_DISABLE>; 378f126890aSEmmanuel Vadot nvidia,open-drain = <TEGRA_PIN_DISABLE>; 379f126890aSEmmanuel Vadot }; 380f126890aSEmmanuel Vadot sys_clk_req_pz5 { 381f126890aSEmmanuel Vadot nvidia,pins = "sys_clk_req_pz5"; 382f126890aSEmmanuel Vadot nvidia,function = "sysclk"; 383f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 384f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 385f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 386f126890aSEmmanuel Vadot }; 387f126890aSEmmanuel Vadot core_pwr_req { 388f126890aSEmmanuel Vadot nvidia,pins = "core_pwr_req"; 389f126890aSEmmanuel Vadot nvidia,function = "pwron"; 390f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 391f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 392f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 393f126890aSEmmanuel Vadot }; 394f126890aSEmmanuel Vadot cpu_pwr_req { 395f126890aSEmmanuel Vadot nvidia,pins = "cpu_pwr_req"; 396f126890aSEmmanuel Vadot nvidia,function = "cpu"; 397f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 398f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 399f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 400f126890aSEmmanuel Vadot }; 401f126890aSEmmanuel Vadot pwr_int_n { 402f126890aSEmmanuel Vadot nvidia,pins = "pwr_int_n"; 403f126890aSEmmanuel Vadot nvidia,function = "pmi"; 404f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 405f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 406f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 407f126890aSEmmanuel Vadot }; 408f126890aSEmmanuel Vadot reset_out_n { 409f126890aSEmmanuel Vadot nvidia,pins = "reset_out_n"; 410f126890aSEmmanuel Vadot nvidia,function = "reset_out_n"; 411f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 412f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 413f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 414f126890aSEmmanuel Vadot }; 415f126890aSEmmanuel Vadot clk3_out_pee0 { 416f126890aSEmmanuel Vadot nvidia,pins = "clk3_out_pee0"; 417f126890aSEmmanuel Vadot nvidia,function = "extperiph3"; 418f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 419f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 420f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 421f126890aSEmmanuel Vadot }; 422f126890aSEmmanuel Vadot gen1_i2c_scl_pc4 { 423f126890aSEmmanuel Vadot nvidia,pins = "gen1_i2c_scl_pc4", 424f126890aSEmmanuel Vadot "gen1_i2c_sda_pc5"; 425f126890aSEmmanuel Vadot nvidia,function = "i2c1"; 426f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 427f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 428f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 429f126890aSEmmanuel Vadot nvidia,lock = <TEGRA_PIN_DISABLE>; 430f126890aSEmmanuel Vadot nvidia,open-drain = <TEGRA_PIN_DISABLE>; 431f126890aSEmmanuel Vadot }; 432f126890aSEmmanuel Vadot uart2_cts_n_pj5 { 433f126890aSEmmanuel Vadot nvidia,pins = "uart2_cts_n_pj5"; 434f126890aSEmmanuel Vadot nvidia,function = "uartb"; 435f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 436f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 437f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 438f126890aSEmmanuel Vadot }; 439f126890aSEmmanuel Vadot uart2_rts_n_pj6 { 440f126890aSEmmanuel Vadot nvidia,pins = "uart2_rts_n_pj6"; 441f126890aSEmmanuel Vadot nvidia,function = "uartb"; 442f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 443f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 444f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 445f126890aSEmmanuel Vadot }; 446f126890aSEmmanuel Vadot uart2_rxd_pc3 { 447f126890aSEmmanuel Vadot nvidia,pins = "uart2_rxd_pc3"; 448f126890aSEmmanuel Vadot nvidia,function = "irda"; 449f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 450f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 451f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 452f126890aSEmmanuel Vadot }; 453f126890aSEmmanuel Vadot uart2_txd_pc2 { 454f126890aSEmmanuel Vadot nvidia,pins = "uart2_txd_pc2"; 455f126890aSEmmanuel Vadot nvidia,function = "irda"; 456f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 457f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 458f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 459f126890aSEmmanuel Vadot }; 460f126890aSEmmanuel Vadot uart3_cts_n_pa1 { 461f126890aSEmmanuel Vadot nvidia,pins = "uart3_cts_n_pa1", 462f126890aSEmmanuel Vadot "uart3_rxd_pw7"; 463f126890aSEmmanuel Vadot nvidia,function = "uartc"; 464f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 465f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 466f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 467f126890aSEmmanuel Vadot }; 468f126890aSEmmanuel Vadot uart3_rts_n_pc0 { 469f126890aSEmmanuel Vadot nvidia,pins = "uart3_rts_n_pc0", 470f126890aSEmmanuel Vadot "uart3_txd_pw6"; 471f126890aSEmmanuel Vadot nvidia,function = "uartc"; 472f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 473f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 474f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 475f126890aSEmmanuel Vadot }; 476f126890aSEmmanuel Vadot owr { 477f126890aSEmmanuel Vadot nvidia,pins = "owr"; 478f126890aSEmmanuel Vadot nvidia,function = "owr"; 479f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 480f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 481f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 482f126890aSEmmanuel Vadot }; 483f126890aSEmmanuel Vadot hdmi_cec_pee3 { 484f126890aSEmmanuel Vadot nvidia,pins = "hdmi_cec_pee3"; 485f126890aSEmmanuel Vadot nvidia,function = "cec"; 486f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 487f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 488f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 489f126890aSEmmanuel Vadot nvidia,lock = <TEGRA_PIN_DISABLE>; 490f126890aSEmmanuel Vadot nvidia,open-drain = <TEGRA_PIN_DISABLE>; 491f126890aSEmmanuel Vadot }; 492f126890aSEmmanuel Vadot ddc_scl_pv4 { 493f126890aSEmmanuel Vadot nvidia,pins = "ddc_scl_pv4", 494f126890aSEmmanuel Vadot "ddc_sda_pv5"; 495f126890aSEmmanuel Vadot nvidia,function = "i2c4"; 496f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 497f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 498f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 499f126890aSEmmanuel Vadot nvidia,lock = <TEGRA_PIN_DISABLE>; 500f126890aSEmmanuel Vadot nvidia,rcv-sel = <TEGRA_PIN_ENABLE>; 501f126890aSEmmanuel Vadot }; 502f126890aSEmmanuel Vadot spdif_in_pk6 { 503f126890aSEmmanuel Vadot nvidia,pins = "spdif_in_pk6"; 504f126890aSEmmanuel Vadot nvidia,function = "usb"; 505f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_UP>; 506f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 507f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 508f126890aSEmmanuel Vadot nvidia,lock = <TEGRA_PIN_DISABLE>; 509f126890aSEmmanuel Vadot }; 510f126890aSEmmanuel Vadot usb_vbus_en0_pn4 { 511f126890aSEmmanuel Vadot nvidia,pins = "usb_vbus_en0_pn4"; 512f126890aSEmmanuel Vadot nvidia,function = "usb"; 513f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_UP>; 514f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 515f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 516f126890aSEmmanuel Vadot nvidia,lock = <TEGRA_PIN_DISABLE>; 517f126890aSEmmanuel Vadot nvidia,open-drain = <TEGRA_PIN_ENABLE>; 518f126890aSEmmanuel Vadot }; 519f126890aSEmmanuel Vadot gpio_x6_aud_px6 { 520f126890aSEmmanuel Vadot nvidia,pins = "gpio_x6_aud_px6"; 521f126890aSEmmanuel Vadot nvidia,function = "spi6"; 522f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_UP>; 523f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 524f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 525f126890aSEmmanuel Vadot }; 526f126890aSEmmanuel Vadot gpio_x4_aud_px4 { 527f126890aSEmmanuel Vadot nvidia,pins = "gpio_x4_aud_px4", 528f126890aSEmmanuel Vadot "gpio_x7_aud_px7"; 529f126890aSEmmanuel Vadot nvidia,function = "rsvd1"; 530f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 531f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 532f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 533f126890aSEmmanuel Vadot }; 534f126890aSEmmanuel Vadot gpio_x5_aud_px5 { 535f126890aSEmmanuel Vadot nvidia,pins = "gpio_x5_aud_px5"; 536f126890aSEmmanuel Vadot nvidia,function = "rsvd1"; 537f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_UP>; 538f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 539f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 540f126890aSEmmanuel Vadot }; 541f126890aSEmmanuel Vadot gpio_w2_aud_pw2 { 542f126890aSEmmanuel Vadot nvidia,pins = "gpio_w2_aud_pw2"; 543f126890aSEmmanuel Vadot nvidia,function = "rsvd2"; 544f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_UP>; 545f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 546f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 547f126890aSEmmanuel Vadot }; 548f126890aSEmmanuel Vadot gpio_w3_aud_pw3 { 549f126890aSEmmanuel Vadot nvidia,pins = "gpio_w3_aud_pw3"; 550f126890aSEmmanuel Vadot nvidia,function = "spi6"; 551f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_UP>; 552f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 553f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 554f126890aSEmmanuel Vadot }; 555f126890aSEmmanuel Vadot gpio_x1_aud_px1 { 556f126890aSEmmanuel Vadot nvidia,pins = "gpio_x1_aud_px1"; 557f126890aSEmmanuel Vadot nvidia,function = "rsvd4"; 558f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 559f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 560f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 561f126890aSEmmanuel Vadot }; 562f126890aSEmmanuel Vadot gpio_x3_aud_px3 { 563f126890aSEmmanuel Vadot nvidia,pins = "gpio_x3_aud_px3"; 564f126890aSEmmanuel Vadot nvidia,function = "rsvd4"; 565f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_UP>; 566f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 567f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 568f126890aSEmmanuel Vadot }; 569f126890aSEmmanuel Vadot dap3_fs_pp0 { 570f126890aSEmmanuel Vadot nvidia,pins = "dap3_fs_pp0"; 571f126890aSEmmanuel Vadot nvidia,function = "i2s2"; 572f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 573f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 574f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 575f126890aSEmmanuel Vadot }; 576f126890aSEmmanuel Vadot dap3_dout_pp2 { 577f126890aSEmmanuel Vadot nvidia,pins = "dap3_dout_pp2"; 578f126890aSEmmanuel Vadot nvidia,function = "i2s2"; 579f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 580f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 581f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 582f126890aSEmmanuel Vadot }; 583f126890aSEmmanuel Vadot pv1 { 584f126890aSEmmanuel Vadot nvidia,pins = "pv1"; 585f126890aSEmmanuel Vadot nvidia,function = "rsvd1"; 586f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 587f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 588f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 589f126890aSEmmanuel Vadot }; 590f126890aSEmmanuel Vadot pbb3 { 591f126890aSEmmanuel Vadot nvidia,pins = "pbb3", 592f126890aSEmmanuel Vadot "pbb5", 593f126890aSEmmanuel Vadot "pbb6", 594f126890aSEmmanuel Vadot "pbb7"; 595f126890aSEmmanuel Vadot nvidia,function = "rsvd4"; 596f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 597f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 598f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 599f126890aSEmmanuel Vadot }; 600f126890aSEmmanuel Vadot pcc1 { 601f126890aSEmmanuel Vadot nvidia,pins = "pcc1", 602f126890aSEmmanuel Vadot "pcc2"; 603f126890aSEmmanuel Vadot nvidia,function = "rsvd4"; 604f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 605f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 606f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 607f126890aSEmmanuel Vadot }; 608f126890aSEmmanuel Vadot gmi_ad0_pg0 { 609f126890aSEmmanuel Vadot nvidia,pins = "gmi_ad0_pg0", 610f126890aSEmmanuel Vadot "gmi_ad1_pg1"; 611f126890aSEmmanuel Vadot nvidia,function = "gmi"; 612f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 613f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 614f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 615f126890aSEmmanuel Vadot }; 616f126890aSEmmanuel Vadot gmi_ad10_ph2 { 617f126890aSEmmanuel Vadot nvidia,pins = "gmi_ad10_ph2", 618f126890aSEmmanuel Vadot "gmi_ad11_ph3", 619f126890aSEmmanuel Vadot "gmi_ad13_ph5", 620f126890aSEmmanuel Vadot "gmi_ad8_ph0", 621f126890aSEmmanuel Vadot "gmi_clk_pk1"; 622f126890aSEmmanuel Vadot nvidia,function = "gmi"; 623f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 624f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 625f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 626f126890aSEmmanuel Vadot }; 627f126890aSEmmanuel Vadot gmi_ad2_pg2 { 628f126890aSEmmanuel Vadot nvidia,pins = "gmi_ad2_pg2", 629f126890aSEmmanuel Vadot "gmi_ad3_pg3"; 630f126890aSEmmanuel Vadot nvidia,function = "gmi"; 631f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 632f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 633f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 634f126890aSEmmanuel Vadot }; 635f126890aSEmmanuel Vadot gmi_adv_n_pk0 { 636f126890aSEmmanuel Vadot nvidia,pins = "gmi_adv_n_pk0", 637f126890aSEmmanuel Vadot "gmi_cs0_n_pj0", 638f126890aSEmmanuel Vadot "gmi_cs2_n_pk3", 639f126890aSEmmanuel Vadot "gmi_cs4_n_pk2", 640f126890aSEmmanuel Vadot "gmi_cs7_n_pi6", 641f126890aSEmmanuel Vadot "gmi_dqs_p_pj3", 642f126890aSEmmanuel Vadot "gmi_iordy_pi5", 643f126890aSEmmanuel Vadot "gmi_wp_n_pc7"; 644f126890aSEmmanuel Vadot nvidia,function = "gmi"; 645f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_UP>; 646f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 647f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 648f126890aSEmmanuel Vadot }; 649f126890aSEmmanuel Vadot gmi_cs3_n_pk4 { 650f126890aSEmmanuel Vadot nvidia,pins = "gmi_cs3_n_pk4"; 651f126890aSEmmanuel Vadot nvidia,function = "gmi"; 652f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_UP>; 653f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 654f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 655f126890aSEmmanuel Vadot }; 656f126890aSEmmanuel Vadot clk2_req_pcc5 { 657f126890aSEmmanuel Vadot nvidia,pins = "clk2_req_pcc5"; 658f126890aSEmmanuel Vadot nvidia,function = "rsvd4"; 659f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 660f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 661f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 662f126890aSEmmanuel Vadot }; 663f126890aSEmmanuel Vadot kb_col3_pq3 { 664f126890aSEmmanuel Vadot nvidia,pins = "kb_col3_pq3", 665f126890aSEmmanuel Vadot "kb_col6_pq6", 666f126890aSEmmanuel Vadot "kb_col7_pq7"; 667f126890aSEmmanuel Vadot nvidia,function = "kbc"; 668f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_UP>; 669f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 670f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 671f126890aSEmmanuel Vadot }; 672f126890aSEmmanuel Vadot kb_col5_pq5 { 673f126890aSEmmanuel Vadot nvidia,pins = "kb_col5_pq5"; 674f126890aSEmmanuel Vadot nvidia,function = "kbc"; 675f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_UP>; 676f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 677f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 678f126890aSEmmanuel Vadot }; 679f126890aSEmmanuel Vadot kb_row3_pr3 { 680f126890aSEmmanuel Vadot nvidia,pins = "kb_row3_pr3", 681f126890aSEmmanuel Vadot "kb_row4_pr4", 682f126890aSEmmanuel Vadot "kb_row6_pr6", 683f126890aSEmmanuel Vadot "kb_row8_ps0"; 684f126890aSEmmanuel Vadot nvidia,function = "kbc"; 685f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 686f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 687f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 688f126890aSEmmanuel Vadot }; 689f126890aSEmmanuel Vadot clk3_req_pee1 { 690f126890aSEmmanuel Vadot nvidia,pins = "clk3_req_pee1"; 691f126890aSEmmanuel Vadot nvidia,function = "rsvd4"; 692f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 693f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 694f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 695f126890aSEmmanuel Vadot }; 696f126890aSEmmanuel Vadot pu4 { 697f126890aSEmmanuel Vadot nvidia,pins = "pu4"; 698f126890aSEmmanuel Vadot nvidia,function = "displayb"; 699f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 700f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 701f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 702f126890aSEmmanuel Vadot }; 703f126890aSEmmanuel Vadot pu5 { 704f126890aSEmmanuel Vadot nvidia,pins = "pu5", 705f126890aSEmmanuel Vadot "pu6"; 706f126890aSEmmanuel Vadot nvidia,function = "displayb"; 707f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_NONE>; 708f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 709f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 710f126890aSEmmanuel Vadot }; 711f126890aSEmmanuel Vadot hdmi_int_pn7 { 712f126890aSEmmanuel Vadot nvidia,pins = "hdmi_int_pn7"; 713f126890aSEmmanuel Vadot nvidia,function = "rsvd1"; 714f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 715f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_DISABLE>; 716f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_ENABLE>; 717f126890aSEmmanuel Vadot }; 718f126890aSEmmanuel Vadot clk1_req_pee2 { 719f126890aSEmmanuel Vadot nvidia,pins = "clk1_req_pee2", 720f126890aSEmmanuel Vadot "usb_vbus_en1_pn5"; 721f126890aSEmmanuel Vadot nvidia,function = "rsvd4"; 722f126890aSEmmanuel Vadot nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 723f126890aSEmmanuel Vadot nvidia,tristate = <TEGRA_PIN_ENABLE>; 724f126890aSEmmanuel Vadot nvidia,enable-input = <TEGRA_PIN_DISABLE>; 725f126890aSEmmanuel Vadot }; 726f126890aSEmmanuel Vadot 727f126890aSEmmanuel Vadot drive_sdio1 { 728f126890aSEmmanuel Vadot nvidia,pins = "drive_sdio1"; 729f126890aSEmmanuel Vadot nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>; 730f126890aSEmmanuel Vadot nvidia,schmitt = <TEGRA_PIN_DISABLE>; 731f126890aSEmmanuel Vadot nvidia,pull-down-strength = <36>; 732f126890aSEmmanuel Vadot nvidia,pull-up-strength = <20>; 733f126890aSEmmanuel Vadot nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOW>; 734f126890aSEmmanuel Vadot nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOW>; 735f126890aSEmmanuel Vadot }; 736f126890aSEmmanuel Vadot drive_sdio3 { 737f126890aSEmmanuel Vadot nvidia,pins = "drive_sdio3"; 738f126890aSEmmanuel Vadot nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>; 739f126890aSEmmanuel Vadot nvidia,schmitt = <TEGRA_PIN_DISABLE>; 740f126890aSEmmanuel Vadot nvidia,pull-down-strength = <22>; 741f126890aSEmmanuel Vadot nvidia,pull-up-strength = <36>; 742f126890aSEmmanuel Vadot nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>; 743f126890aSEmmanuel Vadot nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>; 744f126890aSEmmanuel Vadot }; 745f126890aSEmmanuel Vadot drive_gma { 746f126890aSEmmanuel Vadot nvidia,pins = "drive_gma"; 747f126890aSEmmanuel Vadot nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>; 748f126890aSEmmanuel Vadot nvidia,schmitt = <TEGRA_PIN_DISABLE>; 749f126890aSEmmanuel Vadot nvidia,pull-down-strength = <2>; 750f126890aSEmmanuel Vadot nvidia,pull-up-strength = <1>; 751f126890aSEmmanuel Vadot nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>; 752f126890aSEmmanuel Vadot nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>; 753f126890aSEmmanuel Vadot }; 754f126890aSEmmanuel Vadot }; 755f126890aSEmmanuel Vadot }; 756f126890aSEmmanuel Vadot 757f126890aSEmmanuel Vadot serial@70006300 { 758*aa1a8ff2SEmmanuel Vadot /delete-property/ dmas; 759*aa1a8ff2SEmmanuel Vadot /delete-property/ dma-names; 760f126890aSEmmanuel Vadot status = "okay"; 761f126890aSEmmanuel Vadot }; 762f126890aSEmmanuel Vadot 763f126890aSEmmanuel Vadot pwm@7000a000 { 764f126890aSEmmanuel Vadot status = "okay"; 765f126890aSEmmanuel Vadot }; 766f126890aSEmmanuel Vadot 767f126890aSEmmanuel Vadot i2c@7000c000 { 768f126890aSEmmanuel Vadot status = "okay"; 769f126890aSEmmanuel Vadot clock-frequency = <100000>; 770f126890aSEmmanuel Vadot 771f126890aSEmmanuel Vadot battery: smart-battery@b { 772f126890aSEmmanuel Vadot compatible = "ti,bq20z45", "sbs,sbs-battery"; 773f126890aSEmmanuel Vadot reg = <0xb>; 774f126890aSEmmanuel Vadot sbs,i2c-retry-count = <2>; 775f126890aSEmmanuel Vadot sbs,poll-retry-count = <100>; 776f126890aSEmmanuel Vadot power-supplies = <&charger>; 777f126890aSEmmanuel Vadot }; 778f126890aSEmmanuel Vadot 779f126890aSEmmanuel Vadot rt5640: rt5640@1c { 780f126890aSEmmanuel Vadot compatible = "realtek,rt5640"; 781f126890aSEmmanuel Vadot reg = <0x1c>; 782f126890aSEmmanuel Vadot interrupt-parent = <&gpio>; 783f126890aSEmmanuel Vadot interrupts = <TEGRA_GPIO(W, 3) IRQ_TYPE_EDGE_FALLING>; 784f126890aSEmmanuel Vadot realtek,ldo1-en-gpios = 785f126890aSEmmanuel Vadot <&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_HIGH>; 786f126890aSEmmanuel Vadot }; 787f126890aSEmmanuel Vadot 788f126890aSEmmanuel Vadot temperature-sensor@4c { 789f126890aSEmmanuel Vadot compatible = "onnn,nct1008"; 790f126890aSEmmanuel Vadot reg = <0x4c>; 791f126890aSEmmanuel Vadot vcc-supply = <&palmas_ldo6_reg>; 792f126890aSEmmanuel Vadot interrupt-parent = <&gpio>; 793f126890aSEmmanuel Vadot interrupts = <TEGRA_GPIO(O, 4) IRQ_TYPE_EDGE_FALLING>; 794f126890aSEmmanuel Vadot }; 795f126890aSEmmanuel Vadot }; 796f126890aSEmmanuel Vadot 797f126890aSEmmanuel Vadot hdmi_ddc: i2c@7000c700 { 798f126890aSEmmanuel Vadot status = "okay"; 799f126890aSEmmanuel Vadot }; 800f126890aSEmmanuel Vadot 801f126890aSEmmanuel Vadot i2c@7000d000 { 802f126890aSEmmanuel Vadot status = "okay"; 803f126890aSEmmanuel Vadot clock-frequency = <400000>; 804f126890aSEmmanuel Vadot 805f126890aSEmmanuel Vadot tps51632@43 { 806f126890aSEmmanuel Vadot compatible = "ti,tps51632"; 807f126890aSEmmanuel Vadot reg = <0x43>; 808f126890aSEmmanuel Vadot regulator-name = "vdd-cpu"; 809f126890aSEmmanuel Vadot regulator-min-microvolt = <500000>; 810f126890aSEmmanuel Vadot regulator-max-microvolt = <1520000>; 811f126890aSEmmanuel Vadot regulator-boot-on; 812f126890aSEmmanuel Vadot regulator-always-on; 813f126890aSEmmanuel Vadot }; 814f126890aSEmmanuel Vadot 815f126890aSEmmanuel Vadot tps65090@48 { 816f126890aSEmmanuel Vadot compatible = "ti,tps65090"; 817f126890aSEmmanuel Vadot reg = <0x48>; 818f126890aSEmmanuel Vadot interrupt-parent = <&gpio>; 819f126890aSEmmanuel Vadot interrupts = <TEGRA_GPIO(J, 0) IRQ_TYPE_LEVEL_HIGH>; 820f126890aSEmmanuel Vadot 821f126890aSEmmanuel Vadot vsys1-supply = <&vdd_ac_bat_reg>; 822f126890aSEmmanuel Vadot vsys2-supply = <&vdd_ac_bat_reg>; 823f126890aSEmmanuel Vadot vsys3-supply = <&vdd_ac_bat_reg>; 824f126890aSEmmanuel Vadot infet1-supply = <&vdd_ac_bat_reg>; 825f126890aSEmmanuel Vadot infet2-supply = <&vdd_ac_bat_reg>; 826f126890aSEmmanuel Vadot infet3-supply = <&tps65090_dcdc2_reg>; 827f126890aSEmmanuel Vadot infet4-supply = <&tps65090_dcdc2_reg>; 828f126890aSEmmanuel Vadot infet5-supply = <&tps65090_dcdc2_reg>; 829f126890aSEmmanuel Vadot infet6-supply = <&tps65090_dcdc2_reg>; 830f126890aSEmmanuel Vadot infet7-supply = <&tps65090_dcdc2_reg>; 831f126890aSEmmanuel Vadot vsys-l1-supply = <&vdd_ac_bat_reg>; 832f126890aSEmmanuel Vadot vsys-l2-supply = <&vdd_ac_bat_reg>; 833f126890aSEmmanuel Vadot 834f126890aSEmmanuel Vadot charger: charger { 835f126890aSEmmanuel Vadot compatible = "ti,tps65090-charger"; 836f126890aSEmmanuel Vadot ti,enable-low-current-chrg; 837f126890aSEmmanuel Vadot }; 838f126890aSEmmanuel Vadot 839f126890aSEmmanuel Vadot regulators { 840f126890aSEmmanuel Vadot tps65090_dcdc1_reg: dcdc1 { 841f126890aSEmmanuel Vadot regulator-name = "vdd-sys-5v0"; 842f126890aSEmmanuel Vadot regulator-always-on; 843f126890aSEmmanuel Vadot regulator-boot-on; 844f126890aSEmmanuel Vadot }; 845f126890aSEmmanuel Vadot 846f126890aSEmmanuel Vadot tps65090_dcdc2_reg: dcdc2 { 847f126890aSEmmanuel Vadot regulator-name = "vdd-sys-3v3"; 848f126890aSEmmanuel Vadot regulator-always-on; 849f126890aSEmmanuel Vadot regulator-boot-on; 850f126890aSEmmanuel Vadot }; 851f126890aSEmmanuel Vadot 852f126890aSEmmanuel Vadot tps65090_dcdc3_reg: dcdc3 { 853f126890aSEmmanuel Vadot regulator-name = "vdd-ao"; 854f126890aSEmmanuel Vadot regulator-always-on; 855f126890aSEmmanuel Vadot regulator-boot-on; 856f126890aSEmmanuel Vadot }; 857f126890aSEmmanuel Vadot 858f126890aSEmmanuel Vadot vdd_bl_reg: fet1 { 859f126890aSEmmanuel Vadot regulator-name = "vdd-lcd-bl"; 860f126890aSEmmanuel Vadot }; 861f126890aSEmmanuel Vadot 862f126890aSEmmanuel Vadot fet3 { 863f126890aSEmmanuel Vadot regulator-name = "vdd-modem-3v3"; 864f126890aSEmmanuel Vadot }; 865f126890aSEmmanuel Vadot 866f126890aSEmmanuel Vadot avdd_lcd_reg: fet4 { 867f126890aSEmmanuel Vadot regulator-name = "avdd-lcd"; 868f126890aSEmmanuel Vadot }; 869f126890aSEmmanuel Vadot 870f126890aSEmmanuel Vadot fet5 { 871f126890aSEmmanuel Vadot regulator-name = "vdd-lvds"; 872f126890aSEmmanuel Vadot }; 873f126890aSEmmanuel Vadot 874f126890aSEmmanuel Vadot fet6 { 875f126890aSEmmanuel Vadot regulator-name = "vdd-sd-slot"; 876f126890aSEmmanuel Vadot regulator-always-on; 877f126890aSEmmanuel Vadot regulator-boot-on; 878f126890aSEmmanuel Vadot }; 879f126890aSEmmanuel Vadot 880f126890aSEmmanuel Vadot fet7 { 881f126890aSEmmanuel Vadot regulator-name = "vdd-com-3v3"; 882f126890aSEmmanuel Vadot }; 883f126890aSEmmanuel Vadot 884f126890aSEmmanuel Vadot ldo1 { 885f126890aSEmmanuel Vadot regulator-name = "vdd-sby-5v0"; 886f126890aSEmmanuel Vadot regulator-always-on; 887f126890aSEmmanuel Vadot regulator-boot-on; 888f126890aSEmmanuel Vadot }; 889f126890aSEmmanuel Vadot 890f126890aSEmmanuel Vadot ldo2 { 891f126890aSEmmanuel Vadot regulator-name = "vdd-sby-3v3"; 892f126890aSEmmanuel Vadot regulator-always-on; 893f126890aSEmmanuel Vadot regulator-boot-on; 894f126890aSEmmanuel Vadot }; 895f126890aSEmmanuel Vadot }; 896f126890aSEmmanuel Vadot }; 897f126890aSEmmanuel Vadot 898f126890aSEmmanuel Vadot palmas: tps65913@58 { 899f126890aSEmmanuel Vadot compatible = "ti,tps65913", "ti,palmas"; 900f126890aSEmmanuel Vadot reg = <0x58>; 901f126890aSEmmanuel Vadot interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>; 902f126890aSEmmanuel Vadot 903f126890aSEmmanuel Vadot #interrupt-cells = <2>; 904f126890aSEmmanuel Vadot interrupt-controller; 905f126890aSEmmanuel Vadot 906f126890aSEmmanuel Vadot ti,system-power-controller; 907f126890aSEmmanuel Vadot 908f126890aSEmmanuel Vadot palmas_gpio: gpio { 909f126890aSEmmanuel Vadot compatible = "ti,palmas-gpio"; 910f126890aSEmmanuel Vadot gpio-controller; 911f126890aSEmmanuel Vadot #gpio-cells = <2>; 912f126890aSEmmanuel Vadot }; 913f126890aSEmmanuel Vadot 914f126890aSEmmanuel Vadot pinmux { 915f126890aSEmmanuel Vadot compatible = "ti,tps65913-pinctrl"; 916f126890aSEmmanuel Vadot pinctrl-names = "default"; 917f126890aSEmmanuel Vadot pinctrl-0 = <&palmas_default>; 918f126890aSEmmanuel Vadot 919f126890aSEmmanuel Vadot palmas_default: pinmux { 920f126890aSEmmanuel Vadot pin_gpio6 { 921f126890aSEmmanuel Vadot pins = "gpio6"; 922f126890aSEmmanuel Vadot function = "gpio"; 923f126890aSEmmanuel Vadot }; 924f126890aSEmmanuel Vadot }; 925f126890aSEmmanuel Vadot }; 926f126890aSEmmanuel Vadot 927f126890aSEmmanuel Vadot pmic { 928f126890aSEmmanuel Vadot compatible = "ti,tps65913-pmic", "ti,palmas-pmic"; 929f126890aSEmmanuel Vadot smps1-in-supply = <&tps65090_dcdc3_reg>; 930f126890aSEmmanuel Vadot smps3-in-supply = <&tps65090_dcdc3_reg>; 931f126890aSEmmanuel Vadot smps4-in-supply = <&tps65090_dcdc2_reg>; 932f126890aSEmmanuel Vadot smps7-in-supply = <&tps65090_dcdc2_reg>; 933f126890aSEmmanuel Vadot smps8-in-supply = <&tps65090_dcdc2_reg>; 934f126890aSEmmanuel Vadot smps9-in-supply = <&tps65090_dcdc2_reg>; 935f126890aSEmmanuel Vadot ldo1-in-supply = <&tps65090_dcdc2_reg>; 936f126890aSEmmanuel Vadot ldo2-in-supply = <&tps65090_dcdc2_reg>; 937f126890aSEmmanuel Vadot ldo3-in-supply = <&palmas_smps3_reg>; 938f126890aSEmmanuel Vadot ldo4-in-supply = <&tps65090_dcdc2_reg>; 939f126890aSEmmanuel Vadot ldo5-in-supply = <&vdd_ac_bat_reg>; 940f126890aSEmmanuel Vadot ldo6-in-supply = <&tps65090_dcdc2_reg>; 941f126890aSEmmanuel Vadot ldo7-in-supply = <&tps65090_dcdc2_reg>; 942f126890aSEmmanuel Vadot ldo8-in-supply = <&tps65090_dcdc3_reg>; 943f126890aSEmmanuel Vadot ldo9-in-supply = <&palmas_smps9_reg>; 944f126890aSEmmanuel Vadot ldoln-in-supply = <&tps65090_dcdc1_reg>; 945f126890aSEmmanuel Vadot ldousb-in-supply = <&tps65090_dcdc1_reg>; 946f126890aSEmmanuel Vadot 947f126890aSEmmanuel Vadot regulators { 948f126890aSEmmanuel Vadot smps12 { 949f126890aSEmmanuel Vadot regulator-name = "vddio-ddr"; 950f126890aSEmmanuel Vadot regulator-min-microvolt = <1350000>; 951f126890aSEmmanuel Vadot regulator-max-microvolt = <1350000>; 952f126890aSEmmanuel Vadot regulator-always-on; 953f126890aSEmmanuel Vadot regulator-boot-on; 954f126890aSEmmanuel Vadot }; 955f126890aSEmmanuel Vadot 956f126890aSEmmanuel Vadot palmas_smps3_reg: smps3 { 957f126890aSEmmanuel Vadot regulator-name = "vddio-1v8"; 958f126890aSEmmanuel Vadot regulator-min-microvolt = <1800000>; 959f126890aSEmmanuel Vadot regulator-max-microvolt = <1800000>; 960f126890aSEmmanuel Vadot regulator-always-on; 961f126890aSEmmanuel Vadot regulator-boot-on; 962f126890aSEmmanuel Vadot }; 963f126890aSEmmanuel Vadot 964f126890aSEmmanuel Vadot smps45 { 965f126890aSEmmanuel Vadot regulator-name = "vdd-core"; 966f126890aSEmmanuel Vadot regulator-min-microvolt = <900000>; 967f126890aSEmmanuel Vadot regulator-max-microvolt = <1400000>; 968f126890aSEmmanuel Vadot regulator-always-on; 969f126890aSEmmanuel Vadot regulator-boot-on; 970f126890aSEmmanuel Vadot }; 971f126890aSEmmanuel Vadot 972f126890aSEmmanuel Vadot smps457 { 973f126890aSEmmanuel Vadot regulator-name = "vdd-core"; 974f126890aSEmmanuel Vadot regulator-min-microvolt = <900000>; 975f126890aSEmmanuel Vadot regulator-max-microvolt = <1400000>; 976f126890aSEmmanuel Vadot regulator-always-on; 977f126890aSEmmanuel Vadot regulator-boot-on; 978f126890aSEmmanuel Vadot }; 979f126890aSEmmanuel Vadot 980f126890aSEmmanuel Vadot smps8 { 981f126890aSEmmanuel Vadot regulator-name = "avdd-pll"; 982f126890aSEmmanuel Vadot regulator-min-microvolt = <1050000>; 983f126890aSEmmanuel Vadot regulator-max-microvolt = <1050000>; 984f126890aSEmmanuel Vadot regulator-always-on; 985f126890aSEmmanuel Vadot regulator-boot-on; 986f126890aSEmmanuel Vadot }; 987f126890aSEmmanuel Vadot 988f126890aSEmmanuel Vadot palmas_smps9_reg: smps9 { 989f126890aSEmmanuel Vadot regulator-name = "sdhci-vdd-sd-slot"; 990f126890aSEmmanuel Vadot regulator-min-microvolt = <2800000>; 991f126890aSEmmanuel Vadot regulator-max-microvolt = <2800000>; 992f126890aSEmmanuel Vadot regulator-always-on; 993f126890aSEmmanuel Vadot }; 994f126890aSEmmanuel Vadot 995f126890aSEmmanuel Vadot ldo1 { 996f126890aSEmmanuel Vadot regulator-name = "avdd-cam1"; 997f126890aSEmmanuel Vadot regulator-min-microvolt = <2800000>; 998f126890aSEmmanuel Vadot regulator-max-microvolt = <2800000>; 999f126890aSEmmanuel Vadot }; 1000f126890aSEmmanuel Vadot 1001f126890aSEmmanuel Vadot ldo2 { 1002f126890aSEmmanuel Vadot regulator-name = "avdd-cam2"; 1003f126890aSEmmanuel Vadot regulator-min-microvolt = <2800000>; 1004f126890aSEmmanuel Vadot regulator-max-microvolt = <2800000>; 1005f126890aSEmmanuel Vadot }; 1006f126890aSEmmanuel Vadot 1007f126890aSEmmanuel Vadot avdd_1v2_reg: ldo3 { 1008f126890aSEmmanuel Vadot regulator-name = "avdd-dsi-csi"; 1009f126890aSEmmanuel Vadot regulator-min-microvolt = <1200000>; 1010f126890aSEmmanuel Vadot regulator-max-microvolt = <1200000>; 1011f126890aSEmmanuel Vadot }; 1012f126890aSEmmanuel Vadot 1013f126890aSEmmanuel Vadot ldo4 { 1014f126890aSEmmanuel Vadot regulator-name = "vpp-fuse"; 1015f126890aSEmmanuel Vadot regulator-min-microvolt = <1800000>; 1016f126890aSEmmanuel Vadot regulator-max-microvolt = <1800000>; 1017f126890aSEmmanuel Vadot }; 1018f126890aSEmmanuel Vadot 1019f126890aSEmmanuel Vadot palmas_ldo6_reg: ldo6 { 1020f126890aSEmmanuel Vadot regulator-name = "vdd-sensor-2v85"; 1021f126890aSEmmanuel Vadot regulator-min-microvolt = <2850000>; 1022f126890aSEmmanuel Vadot regulator-max-microvolt = <2850000>; 1023f126890aSEmmanuel Vadot }; 1024f126890aSEmmanuel Vadot 1025f126890aSEmmanuel Vadot ldo7 { 1026f126890aSEmmanuel Vadot regulator-name = "vdd-af-cam1"; 1027f126890aSEmmanuel Vadot regulator-min-microvolt = <2800000>; 1028f126890aSEmmanuel Vadot regulator-max-microvolt = <2800000>; 1029f126890aSEmmanuel Vadot }; 1030f126890aSEmmanuel Vadot 1031f126890aSEmmanuel Vadot ldo8 { 1032f126890aSEmmanuel Vadot regulator-name = "vdd-rtc"; 1033f126890aSEmmanuel Vadot regulator-min-microvolt = <900000>; 1034f126890aSEmmanuel Vadot regulator-max-microvolt = <900000>; 1035f126890aSEmmanuel Vadot regulator-always-on; 1036f126890aSEmmanuel Vadot regulator-boot-on; 1037f126890aSEmmanuel Vadot ti,enable-ldo8-tracking; 1038f126890aSEmmanuel Vadot }; 1039f126890aSEmmanuel Vadot 1040f126890aSEmmanuel Vadot ldo9 { 1041f126890aSEmmanuel Vadot regulator-name = "vddio-sdmmc-2"; 1042f126890aSEmmanuel Vadot regulator-min-microvolt = <1800000>; 1043f126890aSEmmanuel Vadot regulator-max-microvolt = <3300000>; 1044f126890aSEmmanuel Vadot regulator-always-on; 1045f126890aSEmmanuel Vadot regulator-boot-on; 1046f126890aSEmmanuel Vadot }; 1047f126890aSEmmanuel Vadot 1048f126890aSEmmanuel Vadot ldoln { 1049f126890aSEmmanuel Vadot regulator-name = "hvdd-usb"; 1050f126890aSEmmanuel Vadot regulator-min-microvolt = <3300000>; 1051f126890aSEmmanuel Vadot regulator-max-microvolt = <3300000>; 1052f126890aSEmmanuel Vadot }; 1053f126890aSEmmanuel Vadot 1054f126890aSEmmanuel Vadot ldousb { 1055f126890aSEmmanuel Vadot regulator-name = "avdd-usb"; 1056f126890aSEmmanuel Vadot regulator-min-microvolt = <3300000>; 1057f126890aSEmmanuel Vadot regulator-max-microvolt = <3300000>; 1058f126890aSEmmanuel Vadot regulator-always-on; 1059f126890aSEmmanuel Vadot regulator-boot-on; 1060f126890aSEmmanuel Vadot }; 1061f126890aSEmmanuel Vadot 1062f126890aSEmmanuel Vadot regen1 { 1063f126890aSEmmanuel Vadot regulator-name = "rail-3v3"; 1064f126890aSEmmanuel Vadot regulator-max-microvolt = <3300000>; 1065f126890aSEmmanuel Vadot regulator-always-on; 1066f126890aSEmmanuel Vadot regulator-boot-on; 1067f126890aSEmmanuel Vadot }; 1068f126890aSEmmanuel Vadot 1069f126890aSEmmanuel Vadot regen2 { 1070f126890aSEmmanuel Vadot regulator-name = "rail-5v0"; 1071f126890aSEmmanuel Vadot regulator-max-microvolt = <5000000>; 1072f126890aSEmmanuel Vadot regulator-always-on; 1073f126890aSEmmanuel Vadot regulator-boot-on; 1074f126890aSEmmanuel Vadot }; 1075f126890aSEmmanuel Vadot }; 1076f126890aSEmmanuel Vadot }; 1077f126890aSEmmanuel Vadot 1078f126890aSEmmanuel Vadot rtc { 1079f126890aSEmmanuel Vadot compatible = "ti,palmas-rtc"; 1080f126890aSEmmanuel Vadot interrupt-parent = <&palmas>; 1081f126890aSEmmanuel Vadot interrupts = <8 0>; 1082f126890aSEmmanuel Vadot }; 1083f126890aSEmmanuel Vadot }; 1084f126890aSEmmanuel Vadot }; 1085f126890aSEmmanuel Vadot 1086f126890aSEmmanuel Vadot spi@7000da00 { 1087f126890aSEmmanuel Vadot status = "okay"; 1088f126890aSEmmanuel Vadot spi-max-frequency = <25000000>; 1089f126890aSEmmanuel Vadot 1090f126890aSEmmanuel Vadot flash@0 { 1091f126890aSEmmanuel Vadot compatible = "winbond,w25q32dw", "jedec,spi-nor"; 1092f126890aSEmmanuel Vadot reg = <0>; 1093f126890aSEmmanuel Vadot spi-max-frequency = <20000000>; 1094f126890aSEmmanuel Vadot }; 1095f126890aSEmmanuel Vadot }; 1096f126890aSEmmanuel Vadot 1097f126890aSEmmanuel Vadot pmc@7000e400 { 1098f126890aSEmmanuel Vadot nvidia,invert-interrupt; 1099f126890aSEmmanuel Vadot nvidia,suspend-mode = <1>; 1100f126890aSEmmanuel Vadot nvidia,cpu-pwr-good-time = <500>; 1101f126890aSEmmanuel Vadot nvidia,cpu-pwr-off-time = <300>; 1102f126890aSEmmanuel Vadot nvidia,core-pwr-good-time = <641 3845>; 1103f126890aSEmmanuel Vadot nvidia,core-pwr-off-time = <61036>; 1104f126890aSEmmanuel Vadot nvidia,core-power-req-active-high; 1105f126890aSEmmanuel Vadot nvidia,sys-clock-req-active-high; 1106f126890aSEmmanuel Vadot }; 1107f126890aSEmmanuel Vadot 1108f126890aSEmmanuel Vadot ahub@70080000 { 1109f126890aSEmmanuel Vadot i2s@70080400 { 1110f126890aSEmmanuel Vadot status = "okay"; 1111f126890aSEmmanuel Vadot }; 1112f126890aSEmmanuel Vadot }; 1113f126890aSEmmanuel Vadot 1114f126890aSEmmanuel Vadot mmc@78000400 { 1115f126890aSEmmanuel Vadot cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>; 1116f126890aSEmmanuel Vadot wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_HIGH>; 1117f126890aSEmmanuel Vadot bus-width = <4>; 1118f126890aSEmmanuel Vadot status = "okay"; 1119f126890aSEmmanuel Vadot }; 1120f126890aSEmmanuel Vadot 1121f126890aSEmmanuel Vadot mmc@78000600 { 1122f126890aSEmmanuel Vadot bus-width = <8>; 1123f126890aSEmmanuel Vadot status = "okay"; 1124f126890aSEmmanuel Vadot non-removable; 1125f126890aSEmmanuel Vadot }; 1126f126890aSEmmanuel Vadot 1127f126890aSEmmanuel Vadot usb@7d000000 { 1128f126890aSEmmanuel Vadot compatible = "nvidia,tegra114-udc"; 1129f126890aSEmmanuel Vadot status = "okay"; 1130f126890aSEmmanuel Vadot dr_mode = "peripheral"; 1131f126890aSEmmanuel Vadot }; 1132f126890aSEmmanuel Vadot 1133f126890aSEmmanuel Vadot usb-phy@7d000000 { 1134f126890aSEmmanuel Vadot status = "okay"; 1135f126890aSEmmanuel Vadot }; 1136f126890aSEmmanuel Vadot 1137f126890aSEmmanuel Vadot usb@7d008000 { 1138f126890aSEmmanuel Vadot status = "okay"; 1139f126890aSEmmanuel Vadot }; 1140f126890aSEmmanuel Vadot 1141f126890aSEmmanuel Vadot usb-phy@7d008000 { 1142f126890aSEmmanuel Vadot status = "okay"; 1143f126890aSEmmanuel Vadot vbus-supply = <&usb3_vbus_reg>; 1144f126890aSEmmanuel Vadot }; 1145f126890aSEmmanuel Vadot 1146f126890aSEmmanuel Vadot backlight: backlight { 1147f126890aSEmmanuel Vadot compatible = "pwm-backlight"; 1148f126890aSEmmanuel Vadot 1149f126890aSEmmanuel Vadot enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>; 1150f126890aSEmmanuel Vadot power-supply = <&vdd_bl_reg>; 1151f126890aSEmmanuel Vadot pwms = <&pwm 1 1000000>; 1152f126890aSEmmanuel Vadot 1153f126890aSEmmanuel Vadot brightness-levels = <0 4 8 16 32 64 128 255>; 1154f126890aSEmmanuel Vadot default-brightness-level = <6>; 1155f126890aSEmmanuel Vadot }; 1156f126890aSEmmanuel Vadot 1157f126890aSEmmanuel Vadot clk32k_in: clock-32k { 1158f126890aSEmmanuel Vadot compatible = "fixed-clock"; 1159f126890aSEmmanuel Vadot clock-frequency = <32768>; 1160f126890aSEmmanuel Vadot #clock-cells = <0>; 1161f126890aSEmmanuel Vadot }; 1162f126890aSEmmanuel Vadot 1163f126890aSEmmanuel Vadot gpio-keys { 1164f126890aSEmmanuel Vadot compatible = "gpio-keys"; 1165f126890aSEmmanuel Vadot 1166f126890aSEmmanuel Vadot key-home { 1167f126890aSEmmanuel Vadot label = "Home"; 1168f126890aSEmmanuel Vadot gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>; 1169f126890aSEmmanuel Vadot linux,code = <KEY_HOME>; 1170f126890aSEmmanuel Vadot }; 1171f126890aSEmmanuel Vadot 1172f126890aSEmmanuel Vadot key-power { 1173f126890aSEmmanuel Vadot label = "Power"; 1174f126890aSEmmanuel Vadot gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>; 1175f126890aSEmmanuel Vadot linux,code = <KEY_POWER>; 1176f126890aSEmmanuel Vadot wakeup-source; 1177f126890aSEmmanuel Vadot }; 1178f126890aSEmmanuel Vadot 1179f126890aSEmmanuel Vadot key-volume-down { 1180f126890aSEmmanuel Vadot label = "Volume Down"; 1181f126890aSEmmanuel Vadot gpios = <&gpio TEGRA_GPIO(R, 1) GPIO_ACTIVE_LOW>; 1182f126890aSEmmanuel Vadot linux,code = <KEY_VOLUMEDOWN>; 1183f126890aSEmmanuel Vadot }; 1184f126890aSEmmanuel Vadot 1185f126890aSEmmanuel Vadot key-volume-up { 1186f126890aSEmmanuel Vadot label = "Volume Up"; 1187f126890aSEmmanuel Vadot gpios = <&gpio TEGRA_GPIO(R, 2) GPIO_ACTIVE_LOW>; 1188f126890aSEmmanuel Vadot linux,code = <KEY_VOLUMEUP>; 1189f126890aSEmmanuel Vadot }; 1190f126890aSEmmanuel Vadot }; 1191f126890aSEmmanuel Vadot 1192f126890aSEmmanuel Vadot vdd_ac_bat_reg: regulator-acbat { 1193f126890aSEmmanuel Vadot compatible = "regulator-fixed"; 1194f126890aSEmmanuel Vadot regulator-name = "vdd_ac_bat"; 1195f126890aSEmmanuel Vadot regulator-min-microvolt = <5000000>; 1196f126890aSEmmanuel Vadot regulator-max-microvolt = <5000000>; 1197f126890aSEmmanuel Vadot regulator-always-on; 1198f126890aSEmmanuel Vadot }; 1199f126890aSEmmanuel Vadot 1200f126890aSEmmanuel Vadot dvdd_ts_reg: regulator-ts { 1201f126890aSEmmanuel Vadot compatible = "regulator-fixed"; 1202f126890aSEmmanuel Vadot regulator-name = "dvdd_ts"; 1203f126890aSEmmanuel Vadot regulator-min-microvolt = <1800000>; 1204f126890aSEmmanuel Vadot regulator-max-microvolt = <1800000>; 1205f126890aSEmmanuel Vadot enable-active-high; 1206f126890aSEmmanuel Vadot gpio = <&gpio TEGRA_GPIO(H, 5) GPIO_ACTIVE_HIGH>; 1207f126890aSEmmanuel Vadot }; 1208f126890aSEmmanuel Vadot 1209f126890aSEmmanuel Vadot usb1_vbus_reg: regulator-usb1 { 1210f126890aSEmmanuel Vadot compatible = "regulator-fixed"; 1211f126890aSEmmanuel Vadot regulator-name = "usb1_vbus"; 1212f126890aSEmmanuel Vadot regulator-min-microvolt = <5000000>; 1213f126890aSEmmanuel Vadot regulator-max-microvolt = <5000000>; 1214f126890aSEmmanuel Vadot enable-active-high; 1215f126890aSEmmanuel Vadot gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>; 1216f126890aSEmmanuel Vadot gpio-open-drain; 1217f126890aSEmmanuel Vadot vin-supply = <&tps65090_dcdc1_reg>; 1218f126890aSEmmanuel Vadot }; 1219f126890aSEmmanuel Vadot 1220f126890aSEmmanuel Vadot usb3_vbus_reg: regulator-usb3 { 1221f126890aSEmmanuel Vadot compatible = "regulator-fixed"; 1222f126890aSEmmanuel Vadot regulator-name = "usb2_vbus"; 1223f126890aSEmmanuel Vadot regulator-min-microvolt = <5000000>; 1224f126890aSEmmanuel Vadot regulator-max-microvolt = <5000000>; 1225f126890aSEmmanuel Vadot enable-active-high; 1226f126890aSEmmanuel Vadot gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>; 1227f126890aSEmmanuel Vadot gpio-open-drain; 1228f126890aSEmmanuel Vadot vin-supply = <&tps65090_dcdc1_reg>; 1229f126890aSEmmanuel Vadot }; 1230f126890aSEmmanuel Vadot 1231f126890aSEmmanuel Vadot vdd_hdmi_reg: regulator-hdmi { 1232f126890aSEmmanuel Vadot compatible = "regulator-fixed"; 1233f126890aSEmmanuel Vadot regulator-name = "vdd_hdmi_5v0"; 1234f126890aSEmmanuel Vadot regulator-min-microvolt = <5000000>; 1235f126890aSEmmanuel Vadot regulator-max-microvolt = <5000000>; 1236f126890aSEmmanuel Vadot vin-supply = <&tps65090_dcdc1_reg>; 1237f126890aSEmmanuel Vadot }; 1238f126890aSEmmanuel Vadot 1239f126890aSEmmanuel Vadot vdd_cam_1v8_reg: regulator-cam { 1240f126890aSEmmanuel Vadot compatible = "regulator-fixed"; 1241f126890aSEmmanuel Vadot regulator-name = "vdd_cam_1v8_reg"; 1242f126890aSEmmanuel Vadot regulator-min-microvolt = <1800000>; 1243f126890aSEmmanuel Vadot regulator-max-microvolt = <1800000>; 1244f126890aSEmmanuel Vadot enable-active-high; 1245f126890aSEmmanuel Vadot gpio = <&palmas_gpio 6 0>; 1246f126890aSEmmanuel Vadot }; 1247f126890aSEmmanuel Vadot 1248f126890aSEmmanuel Vadot vdd_5v0_hdmi: regulator-hdmicon { 1249f126890aSEmmanuel Vadot compatible = "regulator-fixed"; 1250f126890aSEmmanuel Vadot regulator-name = "VDD_5V0_HDMI_CON"; 1251f126890aSEmmanuel Vadot regulator-min-microvolt = <5000000>; 1252f126890aSEmmanuel Vadot regulator-max-microvolt = <5000000>; 1253f126890aSEmmanuel Vadot gpio = <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_HIGH>; 1254f126890aSEmmanuel Vadot enable-active-high; 1255f126890aSEmmanuel Vadot vin-supply = <&tps65090_dcdc1_reg>; 1256f126890aSEmmanuel Vadot }; 1257f126890aSEmmanuel Vadot 1258f126890aSEmmanuel Vadot sound { 1259f126890aSEmmanuel Vadot compatible = "nvidia,tegra-audio-rt5640-dalmore", 1260f126890aSEmmanuel Vadot "nvidia,tegra-audio-rt5640"; 1261f126890aSEmmanuel Vadot nvidia,model = "NVIDIA Tegra Dalmore"; 1262f126890aSEmmanuel Vadot 1263f126890aSEmmanuel Vadot nvidia,audio-routing = 1264f126890aSEmmanuel Vadot "Headphones", "HPOR", 1265f126890aSEmmanuel Vadot "Headphones", "HPOL", 1266f126890aSEmmanuel Vadot "Speakers", "SPORP", 1267f126890aSEmmanuel Vadot "Speakers", "SPORN", 1268f126890aSEmmanuel Vadot "Speakers", "SPOLP", 1269f126890aSEmmanuel Vadot "Speakers", "SPOLN", 1270f126890aSEmmanuel Vadot "Mic Jack", "MICBIAS1", 1271f126890aSEmmanuel Vadot "IN2P", "Mic Jack"; 1272f126890aSEmmanuel Vadot 1273f126890aSEmmanuel Vadot nvidia,i2s-controller = <&tegra_i2s1>; 1274f126890aSEmmanuel Vadot nvidia,audio-codec = <&rt5640>; 1275f126890aSEmmanuel Vadot 1276f126890aSEmmanuel Vadot nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(R, 7) GPIO_ACTIVE_HIGH>; 1277f126890aSEmmanuel Vadot 1278f126890aSEmmanuel Vadot clocks = <&tegra_car TEGRA114_CLK_PLL_A>, 1279f126890aSEmmanuel Vadot <&tegra_car TEGRA114_CLK_PLL_A_OUT0>, 1280f126890aSEmmanuel Vadot <&tegra_pmc TEGRA_PMC_CLK_OUT_1>; 1281f126890aSEmmanuel Vadot clock-names = "pll_a", "pll_a_out0", "mclk"; 1282f126890aSEmmanuel Vadot 1283f126890aSEmmanuel Vadot assigned-clocks = <&tegra_car TEGRA114_CLK_EXTERN1>, 1284f126890aSEmmanuel Vadot <&tegra_pmc TEGRA_PMC_CLK_OUT_1>; 1285f126890aSEmmanuel Vadot 1286f126890aSEmmanuel Vadot assigned-clock-parents = <&tegra_car TEGRA114_CLK_PLL_A_OUT0>, 1287f126890aSEmmanuel Vadot <&tegra_car TEGRA114_CLK_EXTERN1>; 1288f126890aSEmmanuel Vadot }; 1289f126890aSEmmanuel Vadot}; 1290