1*f126890aSEmmanuel Vadot// SPDX-License-Identifier: (GPL-2.0 OR MIT) 2*f126890aSEmmanuel Vadot/* 3*f126890aSEmmanuel Vadot * Device Tree include file for SolidRun Clearfog 88F6828 based boards 4*f126890aSEmmanuel Vadot * 5*f126890aSEmmanuel Vadot * Copyright (C) 2015 Russell King 6*f126890aSEmmanuel Vadot */ 7*f126890aSEmmanuel Vadot 8*f126890aSEmmanuel Vadot#include "armada-388.dtsi" 9*f126890aSEmmanuel Vadot#include "armada-38x-solidrun-microsom.dtsi" 10*f126890aSEmmanuel Vadot 11*f126890aSEmmanuel Vadot/ { 12*f126890aSEmmanuel Vadot aliases { 13*f126890aSEmmanuel Vadot /* So that mvebu u-boot can update the MAC addresses */ 14*f126890aSEmmanuel Vadot ethernet1 = ð0; 15*f126890aSEmmanuel Vadot ethernet2 = ð1; 16*f126890aSEmmanuel Vadot ethernet3 = ð2; 17*f126890aSEmmanuel Vadot }; 18*f126890aSEmmanuel Vadot 19*f126890aSEmmanuel Vadot chosen { 20*f126890aSEmmanuel Vadot stdout-path = "serial0:115200n8"; 21*f126890aSEmmanuel Vadot }; 22*f126890aSEmmanuel Vadot 23*f126890aSEmmanuel Vadot reg_3p3v: regulator-3p3v { 24*f126890aSEmmanuel Vadot compatible = "regulator-fixed"; 25*f126890aSEmmanuel Vadot regulator-name = "3P3V"; 26*f126890aSEmmanuel Vadot regulator-min-microvolt = <3300000>; 27*f126890aSEmmanuel Vadot regulator-max-microvolt = <3300000>; 28*f126890aSEmmanuel Vadot regulator-always-on; 29*f126890aSEmmanuel Vadot }; 30*f126890aSEmmanuel Vadot 31*f126890aSEmmanuel Vadot soc { 32*f126890aSEmmanuel Vadot internal-regs { 33*f126890aSEmmanuel Vadot sata@a8000 { 34*f126890aSEmmanuel Vadot /* pinctrl? */ 35*f126890aSEmmanuel Vadot status = "okay"; 36*f126890aSEmmanuel Vadot }; 37*f126890aSEmmanuel Vadot 38*f126890aSEmmanuel Vadot sata@e0000 { 39*f126890aSEmmanuel Vadot /* pinctrl? */ 40*f126890aSEmmanuel Vadot status = "okay"; 41*f126890aSEmmanuel Vadot }; 42*f126890aSEmmanuel Vadot 43*f126890aSEmmanuel Vadot sdhci@d8000 { 44*f126890aSEmmanuel Vadot bus-width = <4>; 45*f126890aSEmmanuel Vadot cd-gpios = <&gpio0 20 GPIO_ACTIVE_LOW>; 46*f126890aSEmmanuel Vadot no-1-8-v; 47*f126890aSEmmanuel Vadot pinctrl-0 = <µsom_sdhci_pins 48*f126890aSEmmanuel Vadot &clearfog_sdhci_cd_pins>; 49*f126890aSEmmanuel Vadot pinctrl-names = "default"; 50*f126890aSEmmanuel Vadot status = "okay"; 51*f126890aSEmmanuel Vadot vmmc-supply = <®_3p3v>; 52*f126890aSEmmanuel Vadot wp-inverted; 53*f126890aSEmmanuel Vadot }; 54*f126890aSEmmanuel Vadot 55*f126890aSEmmanuel Vadot usb@58000 { 56*f126890aSEmmanuel Vadot /* CON3, nearest power. */ 57*f126890aSEmmanuel Vadot status = "okay"; 58*f126890aSEmmanuel Vadot }; 59*f126890aSEmmanuel Vadot 60*f126890aSEmmanuel Vadot usb3@f8000 { 61*f126890aSEmmanuel Vadot /* CON7 */ 62*f126890aSEmmanuel Vadot status = "okay"; 63*f126890aSEmmanuel Vadot }; 64*f126890aSEmmanuel Vadot }; 65*f126890aSEmmanuel Vadot 66*f126890aSEmmanuel Vadot pcie { 67*f126890aSEmmanuel Vadot status = "okay"; 68*f126890aSEmmanuel Vadot /* 69*f126890aSEmmanuel Vadot * The two PCIe units are accessible through 70*f126890aSEmmanuel Vadot * the mini-PCIe connectors on the board. 71*f126890aSEmmanuel Vadot */ 72*f126890aSEmmanuel Vadot pcie@2,0 { 73*f126890aSEmmanuel Vadot /* Port 1, Lane 0. CON3, nearest power. */ 74*f126890aSEmmanuel Vadot reset-gpios = <&expander0 1 GPIO_ACTIVE_LOW>; 75*f126890aSEmmanuel Vadot status = "okay"; 76*f126890aSEmmanuel Vadot }; 77*f126890aSEmmanuel Vadot }; 78*f126890aSEmmanuel Vadot }; 79*f126890aSEmmanuel Vadot 80*f126890aSEmmanuel Vadot sfp: sfp { 81*f126890aSEmmanuel Vadot compatible = "sff,sfp"; 82*f126890aSEmmanuel Vadot i2c-bus = <&i2c1>; 83*f126890aSEmmanuel Vadot los-gpio = <&expander0 12 GPIO_ACTIVE_HIGH>; 84*f126890aSEmmanuel Vadot mod-def0-gpio = <&expander0 15 GPIO_ACTIVE_LOW>; 85*f126890aSEmmanuel Vadot tx-disable-gpio = <&expander0 14 GPIO_ACTIVE_HIGH>; 86*f126890aSEmmanuel Vadot tx-fault-gpio = <&expander0 13 GPIO_ACTIVE_HIGH>; 87*f126890aSEmmanuel Vadot maximum-power-milliwatt = <2000>; 88*f126890aSEmmanuel Vadot }; 89*f126890aSEmmanuel Vadot}; 90*f126890aSEmmanuel Vadot 91*f126890aSEmmanuel Vadotð1 { 92*f126890aSEmmanuel Vadot /* ethernet@30000 */ 93*f126890aSEmmanuel Vadot bm,pool-long = <2>; 94*f126890aSEmmanuel Vadot bm,pool-short = <1>; 95*f126890aSEmmanuel Vadot buffer-manager = <&bm>; 96*f126890aSEmmanuel Vadot phys = <&comphy1 1>; 97*f126890aSEmmanuel Vadot phy-mode = "sgmii"; 98*f126890aSEmmanuel Vadot status = "okay"; 99*f126890aSEmmanuel Vadot}; 100*f126890aSEmmanuel Vadot 101*f126890aSEmmanuel Vadotð2 { 102*f126890aSEmmanuel Vadot /* ethernet@34000 */ 103*f126890aSEmmanuel Vadot bm,pool-long = <3>; 104*f126890aSEmmanuel Vadot bm,pool-short = <1>; 105*f126890aSEmmanuel Vadot buffer-manager = <&bm>; 106*f126890aSEmmanuel Vadot managed = "in-band-status"; 107*f126890aSEmmanuel Vadot phys = <&comphy5 2>; 108*f126890aSEmmanuel Vadot phy-mode = "sgmii"; 109*f126890aSEmmanuel Vadot sfp = <&sfp>; 110*f126890aSEmmanuel Vadot status = "okay"; 111*f126890aSEmmanuel Vadot}; 112*f126890aSEmmanuel Vadot 113*f126890aSEmmanuel Vadot&i2c0 { 114*f126890aSEmmanuel Vadot /* 115*f126890aSEmmanuel Vadot * PCA9655 GPIO expander, up to 1MHz clock. 116*f126890aSEmmanuel Vadot * 0-CON3 CLKREQ# 117*f126890aSEmmanuel Vadot * 1-CON3 PERST# 118*f126890aSEmmanuel Vadot * 2- 119*f126890aSEmmanuel Vadot * 3-CON3 W_DISABLE 120*f126890aSEmmanuel Vadot * 4- 121*f126890aSEmmanuel Vadot * 5-USB3 overcurrent 122*f126890aSEmmanuel Vadot * 6-USB3 power 123*f126890aSEmmanuel Vadot * 7- 124*f126890aSEmmanuel Vadot * 8-JP4 P1 125*f126890aSEmmanuel Vadot * 9-JP4 P4 126*f126890aSEmmanuel Vadot * 10-JP4 P5 127*f126890aSEmmanuel Vadot * 11-m.2 DEVSLP 128*f126890aSEmmanuel Vadot * 12-SFP_LOS 129*f126890aSEmmanuel Vadot * 13-SFP_TX_FAULT 130*f126890aSEmmanuel Vadot * 14-SFP_TX_DISABLE 131*f126890aSEmmanuel Vadot * 15-SFP_MOD_DEF0 132*f126890aSEmmanuel Vadot */ 133*f126890aSEmmanuel Vadot expander0: gpio-expander@20 { 134*f126890aSEmmanuel Vadot /* 135*f126890aSEmmanuel Vadot * This is how it should be: 136*f126890aSEmmanuel Vadot * compatible = "onnn,pca9655", "nxp,pca9555"; 137*f126890aSEmmanuel Vadot * but you can't do this because of the way I2C works. 138*f126890aSEmmanuel Vadot */ 139*f126890aSEmmanuel Vadot compatible = "nxp,pca9555"; 140*f126890aSEmmanuel Vadot gpio-controller; 141*f126890aSEmmanuel Vadot #gpio-cells = <2>; 142*f126890aSEmmanuel Vadot reg = <0x20>; 143*f126890aSEmmanuel Vadot 144*f126890aSEmmanuel Vadot pcie1-0-clkreq-hog { 145*f126890aSEmmanuel Vadot gpio-hog; 146*f126890aSEmmanuel Vadot gpios = <0 GPIO_ACTIVE_LOW>; 147*f126890aSEmmanuel Vadot input; 148*f126890aSEmmanuel Vadot line-name = "pcie1.0-clkreq"; 149*f126890aSEmmanuel Vadot }; 150*f126890aSEmmanuel Vadot pcie1-0-w-disable-hog { 151*f126890aSEmmanuel Vadot gpio-hog; 152*f126890aSEmmanuel Vadot gpios = <3 GPIO_ACTIVE_LOW>; 153*f126890aSEmmanuel Vadot output-low; 154*f126890aSEmmanuel Vadot line-name = "pcie1.0-w-disable"; 155*f126890aSEmmanuel Vadot }; 156*f126890aSEmmanuel Vadot usb3-ilimit-hog { 157*f126890aSEmmanuel Vadot gpio-hog; 158*f126890aSEmmanuel Vadot gpios = <5 GPIO_ACTIVE_LOW>; 159*f126890aSEmmanuel Vadot input; 160*f126890aSEmmanuel Vadot line-name = "usb3-current-limit"; 161*f126890aSEmmanuel Vadot }; 162*f126890aSEmmanuel Vadot usb3-power-hog { 163*f126890aSEmmanuel Vadot gpio-hog; 164*f126890aSEmmanuel Vadot gpios = <6 GPIO_ACTIVE_HIGH>; 165*f126890aSEmmanuel Vadot output-high; 166*f126890aSEmmanuel Vadot line-name = "usb3-power"; 167*f126890aSEmmanuel Vadot }; 168*f126890aSEmmanuel Vadot m2-devslp-hog { 169*f126890aSEmmanuel Vadot gpio-hog; 170*f126890aSEmmanuel Vadot gpios = <11 GPIO_ACTIVE_HIGH>; 171*f126890aSEmmanuel Vadot output-low; 172*f126890aSEmmanuel Vadot line-name = "m.2 devslp"; 173*f126890aSEmmanuel Vadot }; 174*f126890aSEmmanuel Vadot }; 175*f126890aSEmmanuel Vadot 176*f126890aSEmmanuel Vadot /* The MCP3021 supports standard and fast modes */ 177*f126890aSEmmanuel Vadot mikrobus_adc: mcp3021@4c { 178*f126890aSEmmanuel Vadot compatible = "microchip,mcp3021"; 179*f126890aSEmmanuel Vadot reg = <0x4c>; 180*f126890aSEmmanuel Vadot }; 181*f126890aSEmmanuel Vadot 182*f126890aSEmmanuel Vadot eeprom@52 { 183*f126890aSEmmanuel Vadot compatible = "atmel,24c02"; 184*f126890aSEmmanuel Vadot reg = <0x52>; 185*f126890aSEmmanuel Vadot pagesize = <16>; 186*f126890aSEmmanuel Vadot }; 187*f126890aSEmmanuel Vadot}; 188*f126890aSEmmanuel Vadot 189*f126890aSEmmanuel Vadot&i2c1 { 190*f126890aSEmmanuel Vadot /* 191*f126890aSEmmanuel Vadot * Routed to SFP, mikrobus, and PCIe. 192*f126890aSEmmanuel Vadot * SFP limits this to 100kHz, and requires an AT24C01A/02/04 with 193*f126890aSEmmanuel Vadot * address pins tied low, which takes addresses 0x50 and 0x51. 194*f126890aSEmmanuel Vadot * Mikrobus doesn't specify beyond an I2C bus being present. 195*f126890aSEmmanuel Vadot * PCIe uses ARP to assign addresses, or 0x63-0x64. 196*f126890aSEmmanuel Vadot */ 197*f126890aSEmmanuel Vadot clock-frequency = <100000>; 198*f126890aSEmmanuel Vadot pinctrl-0 = <&clearfog_i2c1_pins>; 199*f126890aSEmmanuel Vadot pinctrl-names = "default"; 200*f126890aSEmmanuel Vadot status = "okay"; 201*f126890aSEmmanuel Vadot}; 202*f126890aSEmmanuel Vadot 203*f126890aSEmmanuel Vadot&pinctrl { 204*f126890aSEmmanuel Vadot clearfog_i2c1_pins: i2c1-pins { 205*f126890aSEmmanuel Vadot /* SFP, PCIe, mSATA, mikrobus */ 206*f126890aSEmmanuel Vadot marvell,pins = "mpp26", "mpp27"; 207*f126890aSEmmanuel Vadot marvell,function = "i2c1"; 208*f126890aSEmmanuel Vadot }; 209*f126890aSEmmanuel Vadot clearfog_sdhci_cd_pins: clearfog-sdhci-cd-pins { 210*f126890aSEmmanuel Vadot marvell,pins = "mpp20"; 211*f126890aSEmmanuel Vadot marvell,function = "gpio"; 212*f126890aSEmmanuel Vadot }; 213*f126890aSEmmanuel Vadot mikro_pins: mikro-pins { 214*f126890aSEmmanuel Vadot /* int: mpp22 rst: mpp29 */ 215*f126890aSEmmanuel Vadot marvell,pins = "mpp22", "mpp29"; 216*f126890aSEmmanuel Vadot marvell,function = "gpio"; 217*f126890aSEmmanuel Vadot }; 218*f126890aSEmmanuel Vadot mikro_spi_pins: mikro-spi-pins { 219*f126890aSEmmanuel Vadot marvell,pins = "mpp43"; 220*f126890aSEmmanuel Vadot marvell,function = "spi1"; 221*f126890aSEmmanuel Vadot }; 222*f126890aSEmmanuel Vadot mikro_uart_pins: mikro-uart-pins { 223*f126890aSEmmanuel Vadot marvell,pins = "mpp24", "mpp25"; 224*f126890aSEmmanuel Vadot marvell,function = "ua1"; 225*f126890aSEmmanuel Vadot }; 226*f126890aSEmmanuel Vadot}; 227*f126890aSEmmanuel Vadot 228*f126890aSEmmanuel Vadot&spi1 { 229*f126890aSEmmanuel Vadot /* 230*f126890aSEmmanuel Vadot * Add SPI CS pins for clearfog: 231*f126890aSEmmanuel Vadot * CS0: W25Q32 232*f126890aSEmmanuel Vadot * CS1: PIC microcontroller (Pro models) 233*f126890aSEmmanuel Vadot * CS2: mikrobus 234*f126890aSEmmanuel Vadot */ 235*f126890aSEmmanuel Vadot pinctrl-0 = <&spi1_pins &mikro_spi_pins>; 236*f126890aSEmmanuel Vadot pinctrl-names = "default"; 237*f126890aSEmmanuel Vadot status = "okay"; 238*f126890aSEmmanuel Vadot}; 239*f126890aSEmmanuel Vadot 240*f126890aSEmmanuel Vadot&uart1 { 241*f126890aSEmmanuel Vadot /* mikrobus uart */ 242*f126890aSEmmanuel Vadot pinctrl-0 = <&mikro_uart_pins>; 243*f126890aSEmmanuel Vadot pinctrl-names = "default"; 244*f126890aSEmmanuel Vadot status = "okay"; 245*f126890aSEmmanuel Vadot}; 246