xref: /freebsd-src/sys/contrib/device-tree/src/arm/intel/pxa/pxa25x.dtsi (revision f126890ac5386406dadf7c4cfa9566cbb56537c5)
1*f126890aSEmmanuel Vadot// SPDX-License-Identifier: GPL-2.0-or-later
2*f126890aSEmmanuel Vadot/*
3*f126890aSEmmanuel Vadot * Copyright (C) 2016 Robert Jarzmik <robert.jarzmik@free.fr>
4*f126890aSEmmanuel Vadot */
5*f126890aSEmmanuel Vadot#include "pxa2xx.dtsi"
6*f126890aSEmmanuel Vadot#include "dt-bindings/clock/pxa-clock.h"
7*f126890aSEmmanuel Vadot
8*f126890aSEmmanuel Vadot/ {
9*f126890aSEmmanuel Vadot	model = "Marvell PXA25x family SoC";
10*f126890aSEmmanuel Vadot	compatible = "marvell,pxa250";
11*f126890aSEmmanuel Vadot
12*f126890aSEmmanuel Vadot	clocks {
13*f126890aSEmmanuel Vadot	       /*
14*f126890aSEmmanuel Vadot		* The muxing of external clocks/internal dividers for osc* clock
15*f126890aSEmmanuel Vadot		* sources has been hidden under the carpet by now.
16*f126890aSEmmanuel Vadot		*/
17*f126890aSEmmanuel Vadot		#address-cells = <1>;
18*f126890aSEmmanuel Vadot		#size-cells = <1>;
19*f126890aSEmmanuel Vadot		ranges;
20*f126890aSEmmanuel Vadot
21*f126890aSEmmanuel Vadot		clks: pxa2xx_clks@41300004 {
22*f126890aSEmmanuel Vadot			compatible = "marvell,pxa250-core-clocks";
23*f126890aSEmmanuel Vadot			#clock-cells = <1>;
24*f126890aSEmmanuel Vadot			status = "okay";
25*f126890aSEmmanuel Vadot		};
26*f126890aSEmmanuel Vadot
27*f126890aSEmmanuel Vadot		/* timer oscillator */
28*f126890aSEmmanuel Vadot		clktimer: oscillator {
29*f126890aSEmmanuel Vadot			compatible = "fixed-clock";
30*f126890aSEmmanuel Vadot			#clock-cells = <0>;
31*f126890aSEmmanuel Vadot			clock-frequency  = <3686400>;
32*f126890aSEmmanuel Vadot			clock-output-names = "ostimer";
33*f126890aSEmmanuel Vadot		};
34*f126890aSEmmanuel Vadot	};
35*f126890aSEmmanuel Vadot
36*f126890aSEmmanuel Vadot	pxabus {
37*f126890aSEmmanuel Vadot		pdma: dma-controller@40000000 {
38*f126890aSEmmanuel Vadot			compatible = "marvell,pdma-1.0";
39*f126890aSEmmanuel Vadot			reg = <0x40000000 0x10000>;
40*f126890aSEmmanuel Vadot			interrupts = <25>;
41*f126890aSEmmanuel Vadot			#dma-cells = <2>;
42*f126890aSEmmanuel Vadot			/* For backwards compatibility: */
43*f126890aSEmmanuel Vadot			#dma-channels = <16>;
44*f126890aSEmmanuel Vadot			dma-channels = <16>;
45*f126890aSEmmanuel Vadot			#dma-requests = <40>;
46*f126890aSEmmanuel Vadot			dma-requests = <40>;
47*f126890aSEmmanuel Vadot			status = "okay";
48*f126890aSEmmanuel Vadot		};
49*f126890aSEmmanuel Vadot
50*f126890aSEmmanuel Vadot		pxairq: interrupt-controller@40d00000 {
51*f126890aSEmmanuel Vadot			marvell,intc-priority;
52*f126890aSEmmanuel Vadot			marvell,intc-nr-irqs = <32>;
53*f126890aSEmmanuel Vadot		};
54*f126890aSEmmanuel Vadot
55*f126890aSEmmanuel Vadot		pinctrl: pinctrl@40e00000 {
56*f126890aSEmmanuel Vadot			reg = <0x40e00054 0x20 0x40e0000c 0xc 0x40e0010c 4
57*f126890aSEmmanuel Vadot			       0x40f00020 0x10>;
58*f126890aSEmmanuel Vadot			compatible = "marvell,pxa25x-pinctrl";
59*f126890aSEmmanuel Vadot		};
60*f126890aSEmmanuel Vadot
61*f126890aSEmmanuel Vadot		gpio: gpio@40e00000 {
62*f126890aSEmmanuel Vadot			compatible = "intel,pxa25x-gpio";
63*f126890aSEmmanuel Vadot			gpio-ranges = <&pinctrl 0 0 84>;
64*f126890aSEmmanuel Vadot			clocks = <&clks CLK_NONE>;
65*f126890aSEmmanuel Vadot		};
66*f126890aSEmmanuel Vadot
67*f126890aSEmmanuel Vadot		pwm0: pwm@40b00000 {
68*f126890aSEmmanuel Vadot			compatible = "marvell,pxa250-pwm";
69*f126890aSEmmanuel Vadot			reg = <0x40b00000 0x10>;
70*f126890aSEmmanuel Vadot			#pwm-cells = <1>;
71*f126890aSEmmanuel Vadot			clocks = <&clks CLK_PWM0>;
72*f126890aSEmmanuel Vadot		};
73*f126890aSEmmanuel Vadot
74*f126890aSEmmanuel Vadot		pwm1: pwm@40b00010 {
75*f126890aSEmmanuel Vadot			compatible = "marvell,pxa250-pwm";
76*f126890aSEmmanuel Vadot			reg = <0x40b00010 0x10>;
77*f126890aSEmmanuel Vadot			#pwm-cells = <1>;
78*f126890aSEmmanuel Vadot			clocks = <&clks CLK_PWM1>;
79*f126890aSEmmanuel Vadot		};
80*f126890aSEmmanuel Vadot
81*f126890aSEmmanuel Vadot		rtc@40900000 {
82*f126890aSEmmanuel Vadot			clocks = <&clks CLK_OSC32k768>;
83*f126890aSEmmanuel Vadot		};
84*f126890aSEmmanuel Vadot	};
85*f126890aSEmmanuel Vadot
86*f126890aSEmmanuel Vadot	timer@40a00000 {
87*f126890aSEmmanuel Vadot		compatible = "marvell,pxa-timer";
88*f126890aSEmmanuel Vadot		reg = <0x40a00000 0x20>;
89*f126890aSEmmanuel Vadot		interrupts = <26>;
90*f126890aSEmmanuel Vadot		clocks = <&clktimer>;
91*f126890aSEmmanuel Vadot		status = "okay";
92*f126890aSEmmanuel Vadot	};
93*f126890aSEmmanuel Vadot
94*f126890aSEmmanuel Vadot	pxa250_opp_table: opp_table0 {
95*f126890aSEmmanuel Vadot		compatible = "operating-points-v2";
96*f126890aSEmmanuel Vadot
97*f126890aSEmmanuel Vadot		opp-99532800 {
98*f126890aSEmmanuel Vadot			opp-hz = /bits/ 64 <99532800>;
99*f126890aSEmmanuel Vadot			opp-microvolt = <1000000 950000 1650000>;
100*f126890aSEmmanuel Vadot			clock-latency-ns = <20>;
101*f126890aSEmmanuel Vadot		};
102*f126890aSEmmanuel Vadot		opp-199065600 {
103*f126890aSEmmanuel Vadot			opp-hz = /bits/ 64 <199065600>;
104*f126890aSEmmanuel Vadot			opp-microvolt = <1000000 950000 1650000>;
105*f126890aSEmmanuel Vadot			clock-latency-ns = <20>;
106*f126890aSEmmanuel Vadot		};
107*f126890aSEmmanuel Vadot		opp-298598400 {
108*f126890aSEmmanuel Vadot			opp-hz = /bits/ 64 <298598400>;
109*f126890aSEmmanuel Vadot			opp-microvolt = <1100000 1045000 1650000>;
110*f126890aSEmmanuel Vadot			clock-latency-ns = <20>;
111*f126890aSEmmanuel Vadot		};
112*f126890aSEmmanuel Vadot		opp-398131200 {
113*f126890aSEmmanuel Vadot			opp-hz = /bits/ 64 <398131200>;
114*f126890aSEmmanuel Vadot			opp-microvolt = <1300000 1235000 1650000>;
115*f126890aSEmmanuel Vadot			clock-latency-ns = <20>;
116*f126890aSEmmanuel Vadot		};
117*f126890aSEmmanuel Vadot	};
118*f126890aSEmmanuel Vadot};
119