1*f126890aSEmmanuel Vadot// SPDX-License-Identifier: ISC 2*f126890aSEmmanuel Vadot/* 3*f126890aSEmmanuel Vadot * Device Tree include file for Intel reference designs for the 4*f126890aSEmmanuel Vadot * XScale Network Processors in the IXP 4xx series. Common device 5*f126890aSEmmanuel Vadot * set-up for IXDP425, IXCDP1100, KIXRP435 and IXDP465. 6*f126890aSEmmanuel Vadot */ 7*f126890aSEmmanuel Vadot 8*f126890aSEmmanuel Vadot/ { 9*f126890aSEmmanuel Vadot memory@0 { 10*f126890aSEmmanuel Vadot /* 11*f126890aSEmmanuel Vadot * The board supports up to 256 MB of memory. Here we put in 12*f126890aSEmmanuel Vadot * 64 MB and this may be modified by the boot loader. 13*f126890aSEmmanuel Vadot */ 14*f126890aSEmmanuel Vadot device_type = "memory"; 15*f126890aSEmmanuel Vadot reg = <0x00000000 0x4000000>; 16*f126890aSEmmanuel Vadot }; 17*f126890aSEmmanuel Vadot 18*f126890aSEmmanuel Vadot chosen { 19*f126890aSEmmanuel Vadot bootargs = "console=ttyS0,115200n8"; 20*f126890aSEmmanuel Vadot stdout-path = "uart0:115200n8"; 21*f126890aSEmmanuel Vadot }; 22*f126890aSEmmanuel Vadot 23*f126890aSEmmanuel Vadot aliases { 24*f126890aSEmmanuel Vadot serial0 = &uart0; 25*f126890aSEmmanuel Vadot }; 26*f126890aSEmmanuel Vadot 27*f126890aSEmmanuel Vadot i2c { 28*f126890aSEmmanuel Vadot compatible = "i2c-gpio"; 29*f126890aSEmmanuel Vadot sda-gpios = <&gpio0 7 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>; 30*f126890aSEmmanuel Vadot scl-gpios = <&gpio0 6 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>; 31*f126890aSEmmanuel Vadot #address-cells = <1>; 32*f126890aSEmmanuel Vadot #size-cells = <0>; 33*f126890aSEmmanuel Vadot 34*f126890aSEmmanuel Vadot eeprom@50 { 35*f126890aSEmmanuel Vadot /* 36*f126890aSEmmanuel Vadot * Philips PCF8582C-2T/03 512byte I2C EEPROM 37*f126890aSEmmanuel Vadot * should behave like an Atmel 24c04. 38*f126890aSEmmanuel Vadot */ 39*f126890aSEmmanuel Vadot compatible = "atmel,24c04"; 40*f126890aSEmmanuel Vadot reg = <0x50>; 41*f126890aSEmmanuel Vadot pagesize = <16>; 42*f126890aSEmmanuel Vadot size = <512>; 43*f126890aSEmmanuel Vadot read-only; 44*f126890aSEmmanuel Vadot }; 45*f126890aSEmmanuel Vadot }; 46*f126890aSEmmanuel Vadot 47*f126890aSEmmanuel Vadot soc { 48*f126890aSEmmanuel Vadot bus@c4000000 { 49*f126890aSEmmanuel Vadot /* Flash memory defined per-variant */ 50*f126890aSEmmanuel Vadot nand-controller@3,0 { 51*f126890aSEmmanuel Vadot /* Some designs have a NAND on CS3 enable it here if present */ 52*f126890aSEmmanuel Vadot status = "disabled"; 53*f126890aSEmmanuel Vadot 54*f126890aSEmmanuel Vadot /* 55*f126890aSEmmanuel Vadot * gen_nand needs to be extended and documented to get 56*f126890aSEmmanuel Vadot * command byte = 1 and address byte = 2 from the device 57*f126890aSEmmanuel Vadot * tree. 58*f126890aSEmmanuel Vadot */ 59*f126890aSEmmanuel Vadot compatible = "gen_nand"; 60*f126890aSEmmanuel Vadot 61*f126890aSEmmanuel Vadot /* Expansion bus set-up */ 62*f126890aSEmmanuel Vadot intel,ixp4xx-eb-t1 = <0>; 63*f126890aSEmmanuel Vadot intel,ixp4xx-eb-t2 = <0>; 64*f126890aSEmmanuel Vadot intel,ixp4xx-eb-t3 = <1>; // 1 cycle extra strobe phase 65*f126890aSEmmanuel Vadot intel,ixp4xx-eb-t4 = <0>; 66*f126890aSEmmanuel Vadot intel,ixp4xx-eb-t5 = <0>; 67*f126890aSEmmanuel Vadot intel,ixp4xx-eb-cycle-type = <0>; // Intel cycle type 68*f126890aSEmmanuel Vadot intel,ixp4xx-eb-byte-access-on-halfword = <0>; 69*f126890aSEmmanuel Vadot intel,ixp4xx-eb-mux-address-and-data = <0>; 70*f126890aSEmmanuel Vadot intel,ixp4xx-eb-ahb-split-transfers = <0>; 71*f126890aSEmmanuel Vadot intel,ixp4xx-eb-write-enable = <1>; 72*f126890aSEmmanuel Vadot intel,ixp4xx-eb-byte-access = <1>; 73*f126890aSEmmanuel Vadot 74*f126890aSEmmanuel Vadot /* 512 bytes memory window */ 75*f126890aSEmmanuel Vadot reg = <3 0x00000000 0x200>; 76*f126890aSEmmanuel Vadot nand-on-flash-bbt; 77*f126890aSEmmanuel Vadot nand-ecc-mode = "soft_bch"; 78*f126890aSEmmanuel Vadot nand-ecc-step-size = <512>; 79*f126890aSEmmanuel Vadot nand-ecc-strength = <4>; 80*f126890aSEmmanuel Vadot nce-gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; /* NCE */ 81*f126890aSEmmanuel Vadot 82*f126890aSEmmanuel Vadot label = "ixp400 NAND"; 83*f126890aSEmmanuel Vadot 84*f126890aSEmmanuel Vadot partitions { 85*f126890aSEmmanuel Vadot compatible = "fixed-partitions"; 86*f126890aSEmmanuel Vadot #address-cells = <1>; 87*f126890aSEmmanuel Vadot #size-cells = <1>; 88*f126890aSEmmanuel Vadot 89*f126890aSEmmanuel Vadot fs@0 { 90*f126890aSEmmanuel Vadot label = "ixp400 NAND FS 0"; 91*f126890aSEmmanuel Vadot reg = <0x0 0x800000>; 92*f126890aSEmmanuel Vadot }; 93*f126890aSEmmanuel Vadot fs@800000 { 94*f126890aSEmmanuel Vadot label = "ixp400 NAND FS 1"; 95*f126890aSEmmanuel Vadot reg = <0x800000 0x0>; 96*f126890aSEmmanuel Vadot }; 97*f126890aSEmmanuel Vadot }; 98*f126890aSEmmanuel Vadot }; 99*f126890aSEmmanuel Vadot }; 100*f126890aSEmmanuel Vadot 101*f126890aSEmmanuel Vadot pci@c0000000 { 102*f126890aSEmmanuel Vadot status = "okay"; 103*f126890aSEmmanuel Vadot 104*f126890aSEmmanuel Vadot /* 105*f126890aSEmmanuel Vadot * Taken from IXDP425 PCI boardfile. 106*f126890aSEmmanuel Vadot * PCI slots on the BIXMB425BD base card. 107*f126890aSEmmanuel Vadot * We have up to 4 slots (IDSEL) with 4 swizzled IRQs. 108*f126890aSEmmanuel Vadot */ 109*f126890aSEmmanuel Vadot #interrupt-cells = <1>; 110*f126890aSEmmanuel Vadot interrupt-map-mask = <0xf800 0 0 7>; 111*f126890aSEmmanuel Vadot interrupt-map = 112*f126890aSEmmanuel Vadot /* IDSEL 1 */ 113*f126890aSEmmanuel Vadot <0x0800 0 0 1 &gpio0 11 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 1 is irq 11 */ 114*f126890aSEmmanuel Vadot <0x0800 0 0 2 &gpio0 10 IRQ_TYPE_LEVEL_LOW>, /* INT B on slot 1 is irq 10 */ 115*f126890aSEmmanuel Vadot <0x0800 0 0 3 &gpio0 9 IRQ_TYPE_LEVEL_LOW>, /* INT C on slot 1 is irq 9 */ 116*f126890aSEmmanuel Vadot <0x0800 0 0 4 &gpio0 8 IRQ_TYPE_LEVEL_LOW>, /* INT D on slot 1 is irq 8 */ 117*f126890aSEmmanuel Vadot /* IDSEL 2 */ 118*f126890aSEmmanuel Vadot <0x1000 0 0 1 &gpio0 10 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 2 is irq 10 */ 119*f126890aSEmmanuel Vadot <0x1000 0 0 2 &gpio0 9 IRQ_TYPE_LEVEL_LOW>, /* INT B on slot 2 is irq 9 */ 120*f126890aSEmmanuel Vadot <0x1000 0 0 3 &gpio0 8 IRQ_TYPE_LEVEL_LOW>, /* INT C on slot 2 is irq 8 */ 121*f126890aSEmmanuel Vadot <0x1000 0 0 4 &gpio0 11 IRQ_TYPE_LEVEL_LOW>, /* INT D on slot 2 is irq 11 */ 122*f126890aSEmmanuel Vadot /* IDSEL 3 */ 123*f126890aSEmmanuel Vadot <0x1800 0 0 1 &gpio0 9 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 3 is irq 9 */ 124*f126890aSEmmanuel Vadot <0x1800 0 0 2 &gpio0 8 IRQ_TYPE_LEVEL_LOW>, /* INT B on slot 3 is irq 8 */ 125*f126890aSEmmanuel Vadot <0x1800 0 0 3 &gpio0 11 IRQ_TYPE_LEVEL_LOW>, /* INT C on slot 3 is irq 11 */ 126*f126890aSEmmanuel Vadot <0x1800 0 0 4 &gpio0 10 IRQ_TYPE_LEVEL_LOW>, /* INT D on slot 3 is irq 10 */ 127*f126890aSEmmanuel Vadot /* IDSEL 4 */ 128*f126890aSEmmanuel Vadot <0x2000 0 0 1 &gpio0 8 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 4 is irq 8 */ 129*f126890aSEmmanuel Vadot <0x2000 0 0 2 &gpio0 11 IRQ_TYPE_LEVEL_LOW>, /* INT B on slot 4 is irq 11 */ 130*f126890aSEmmanuel Vadot <0x2000 0 0 3 &gpio0 10 IRQ_TYPE_LEVEL_LOW>, /* INT C on slot 4 is irq 10 */ 131*f126890aSEmmanuel Vadot <0x2000 0 0 4 &gpio0 9 IRQ_TYPE_LEVEL_LOW>; /* INT D on slot 4 is irq 9 */ 132*f126890aSEmmanuel Vadot }; 133*f126890aSEmmanuel Vadot }; 134*f126890aSEmmanuel Vadot}; 135