1*f126890aSEmmanuel Vadot// SPDX-License-Identifier: GPL-2.0-or-later 2*f126890aSEmmanuel Vadot/* 3*f126890aSEmmanuel Vadot * arch/arm/boot/dts/axm55xx.dtsi 4*f126890aSEmmanuel Vadot * 5*f126890aSEmmanuel Vadot * Copyright (C) 2013 LSI 6*f126890aSEmmanuel Vadot */ 7*f126890aSEmmanuel Vadot 8*f126890aSEmmanuel Vadot#include <dt-bindings/interrupt-controller/arm-gic.h> 9*f126890aSEmmanuel Vadot#include <dt-bindings/clock/lsi,axm5516-clks.h> 10*f126890aSEmmanuel Vadot 11*f126890aSEmmanuel Vadot/ { 12*f126890aSEmmanuel Vadot #address-cells = <2>; 13*f126890aSEmmanuel Vadot #size-cells = <2>; 14*f126890aSEmmanuel Vadot interrupt-parent = <&gic>; 15*f126890aSEmmanuel Vadot 16*f126890aSEmmanuel Vadot aliases { 17*f126890aSEmmanuel Vadot serial0 = &serial0; 18*f126890aSEmmanuel Vadot serial1 = &serial1; 19*f126890aSEmmanuel Vadot serial2 = &serial2; 20*f126890aSEmmanuel Vadot serial3 = &serial3; 21*f126890aSEmmanuel Vadot timer = &timer0; 22*f126890aSEmmanuel Vadot }; 23*f126890aSEmmanuel Vadot 24*f126890aSEmmanuel Vadot clocks { 25*f126890aSEmmanuel Vadot compatible = "simple-bus"; 26*f126890aSEmmanuel Vadot #address-cells = <2>; 27*f126890aSEmmanuel Vadot #size-cells = <2>; 28*f126890aSEmmanuel Vadot ranges; 29*f126890aSEmmanuel Vadot 30*f126890aSEmmanuel Vadot clk_ref0: clk_ref0 { 31*f126890aSEmmanuel Vadot compatible = "fixed-clock"; 32*f126890aSEmmanuel Vadot #clock-cells = <0>; 33*f126890aSEmmanuel Vadot clock-frequency = <125000000>; 34*f126890aSEmmanuel Vadot }; 35*f126890aSEmmanuel Vadot 36*f126890aSEmmanuel Vadot clk_ref1: clk_ref1 { 37*f126890aSEmmanuel Vadot compatible = "fixed-clock"; 38*f126890aSEmmanuel Vadot #clock-cells = <0>; 39*f126890aSEmmanuel Vadot clock-frequency = <125000000>; 40*f126890aSEmmanuel Vadot }; 41*f126890aSEmmanuel Vadot 42*f126890aSEmmanuel Vadot clk_ref2: clk_ref2 { 43*f126890aSEmmanuel Vadot compatible = "fixed-clock"; 44*f126890aSEmmanuel Vadot #clock-cells = <0>; 45*f126890aSEmmanuel Vadot clock-frequency = <125000000>; 46*f126890aSEmmanuel Vadot }; 47*f126890aSEmmanuel Vadot 48*f126890aSEmmanuel Vadot clks: clock-controller@2010020000 { 49*f126890aSEmmanuel Vadot compatible = "lsi,axm5516-clks"; 50*f126890aSEmmanuel Vadot #clock-cells = <1>; 51*f126890aSEmmanuel Vadot reg = <0x20 0x10020000 0 0x20000>; 52*f126890aSEmmanuel Vadot }; 53*f126890aSEmmanuel Vadot }; 54*f126890aSEmmanuel Vadot 55*f126890aSEmmanuel Vadot gic: interrupt-controller@2001001000 { 56*f126890aSEmmanuel Vadot compatible = "arm,cortex-a15-gic"; 57*f126890aSEmmanuel Vadot #interrupt-cells = <3>; 58*f126890aSEmmanuel Vadot #address-cells = <0>; 59*f126890aSEmmanuel Vadot interrupt-controller; 60*f126890aSEmmanuel Vadot reg = <0x20 0x01001000 0 0x1000>, 61*f126890aSEmmanuel Vadot <0x20 0x01002000 0 0x2000>, 62*f126890aSEmmanuel Vadot <0x20 0x01004000 0 0x2000>, 63*f126890aSEmmanuel Vadot <0x20 0x01006000 0 0x2000>; 64*f126890aSEmmanuel Vadot interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | 65*f126890aSEmmanuel Vadot IRQ_TYPE_LEVEL_HIGH)>; 66*f126890aSEmmanuel Vadot }; 67*f126890aSEmmanuel Vadot 68*f126890aSEmmanuel Vadot timer { 69*f126890aSEmmanuel Vadot compatible = "arm,armv7-timer"; 70*f126890aSEmmanuel Vadot interrupts = 71*f126890aSEmmanuel Vadot <GIC_PPI 13 72*f126890aSEmmanuel Vadot (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 73*f126890aSEmmanuel Vadot <GIC_PPI 14 74*f126890aSEmmanuel Vadot (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 75*f126890aSEmmanuel Vadot <GIC_PPI 11 76*f126890aSEmmanuel Vadot (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 77*f126890aSEmmanuel Vadot <GIC_PPI 10 78*f126890aSEmmanuel Vadot (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; 79*f126890aSEmmanuel Vadot }; 80*f126890aSEmmanuel Vadot 81*f126890aSEmmanuel Vadot 82*f126890aSEmmanuel Vadot pmu { 83*f126890aSEmmanuel Vadot compatible = "arm,cortex-a15-pmu"; 84*f126890aSEmmanuel Vadot interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; 85*f126890aSEmmanuel Vadot }; 86*f126890aSEmmanuel Vadot 87*f126890aSEmmanuel Vadot soc { 88*f126890aSEmmanuel Vadot compatible = "simple-bus"; 89*f126890aSEmmanuel Vadot device_type = "soc"; 90*f126890aSEmmanuel Vadot #address-cells = <2>; 91*f126890aSEmmanuel Vadot #size-cells = <2>; 92*f126890aSEmmanuel Vadot interrupt-parent = <&gic>; 93*f126890aSEmmanuel Vadot ranges; 94*f126890aSEmmanuel Vadot 95*f126890aSEmmanuel Vadot syscon: syscon@2010030000 { 96*f126890aSEmmanuel Vadot compatible = "lsi,axxia-syscon", "syscon"; 97*f126890aSEmmanuel Vadot reg = <0x20 0x10030000 0 0x2000>; 98*f126890aSEmmanuel Vadot }; 99*f126890aSEmmanuel Vadot 100*f126890aSEmmanuel Vadot reset: reset@2010031000 { 101*f126890aSEmmanuel Vadot compatible = "lsi,axm55xx-reset"; 102*f126890aSEmmanuel Vadot syscon = <&syscon>; 103*f126890aSEmmanuel Vadot }; 104*f126890aSEmmanuel Vadot 105*f126890aSEmmanuel Vadot amba { 106*f126890aSEmmanuel Vadot compatible = "simple-bus"; 107*f126890aSEmmanuel Vadot #address-cells = <2>; 108*f126890aSEmmanuel Vadot #size-cells = <2>; 109*f126890aSEmmanuel Vadot ranges; 110*f126890aSEmmanuel Vadot 111*f126890aSEmmanuel Vadot serial0: serial@2010080000 { 112*f126890aSEmmanuel Vadot compatible = "arm,pl011", "arm,primecell"; 113*f126890aSEmmanuel Vadot reg = <0x20 0x10080000 0 0x1000>; 114*f126890aSEmmanuel Vadot interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>; 115*f126890aSEmmanuel Vadot clocks = <&clks AXXIA_CLK_PER>; 116*f126890aSEmmanuel Vadot clock-names = "apb_pclk"; 117*f126890aSEmmanuel Vadot status = "disabled"; 118*f126890aSEmmanuel Vadot }; 119*f126890aSEmmanuel Vadot 120*f126890aSEmmanuel Vadot serial1: serial@2010081000 { 121*f126890aSEmmanuel Vadot compatible = "arm,pl011", "arm,primecell"; 122*f126890aSEmmanuel Vadot reg = <0x20 0x10081000 0 0x1000>; 123*f126890aSEmmanuel Vadot interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; 124*f126890aSEmmanuel Vadot clocks = <&clks AXXIA_CLK_PER>; 125*f126890aSEmmanuel Vadot clock-names = "apb_pclk"; 126*f126890aSEmmanuel Vadot status = "disabled"; 127*f126890aSEmmanuel Vadot }; 128*f126890aSEmmanuel Vadot 129*f126890aSEmmanuel Vadot serial2: serial@2010082000 { 130*f126890aSEmmanuel Vadot compatible = "arm,pl011", "arm,primecell"; 131*f126890aSEmmanuel Vadot reg = <0x20 0x10082000 0 0x1000>; 132*f126890aSEmmanuel Vadot interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; 133*f126890aSEmmanuel Vadot clocks = <&clks AXXIA_CLK_PER>; 134*f126890aSEmmanuel Vadot clock-names = "apb_pclk"; 135*f126890aSEmmanuel Vadot status = "disabled"; 136*f126890aSEmmanuel Vadot }; 137*f126890aSEmmanuel Vadot 138*f126890aSEmmanuel Vadot serial3: serial@2010083000 { 139*f126890aSEmmanuel Vadot compatible = "arm,pl011", "arm,primecell"; 140*f126890aSEmmanuel Vadot reg = <0x20 0x10083000 0 0x1000>; 141*f126890aSEmmanuel Vadot interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; 142*f126890aSEmmanuel Vadot clocks = <&clks AXXIA_CLK_PER>; 143*f126890aSEmmanuel Vadot clock-names = "apb_pclk"; 144*f126890aSEmmanuel Vadot status = "disabled"; 145*f126890aSEmmanuel Vadot }; 146*f126890aSEmmanuel Vadot 147*f126890aSEmmanuel Vadot timer0: timer@2010091000 { 148*f126890aSEmmanuel Vadot compatible = "arm,sp804", "arm,primecell"; 149*f126890aSEmmanuel Vadot reg = <0x20 0x10091000 0 0x1000>; 150*f126890aSEmmanuel Vadot interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 151*f126890aSEmmanuel Vadot <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 152*f126890aSEmmanuel Vadot <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 153*f126890aSEmmanuel Vadot <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 154*f126890aSEmmanuel Vadot <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 155*f126890aSEmmanuel Vadot <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 156*f126890aSEmmanuel Vadot <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 157*f126890aSEmmanuel Vadot <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 158*f126890aSEmmanuel Vadot <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>; 159*f126890aSEmmanuel Vadot clocks = <&clks AXXIA_CLK_PER>; 160*f126890aSEmmanuel Vadot clock-names = "apb_pclk"; 161*f126890aSEmmanuel Vadot status = "okay"; 162*f126890aSEmmanuel Vadot }; 163*f126890aSEmmanuel Vadot 164*f126890aSEmmanuel Vadot gpio0: gpio@2010092000 { 165*f126890aSEmmanuel Vadot #gpio-cells = <2>; 166*f126890aSEmmanuel Vadot compatible = "arm,pl061", "arm,primecell"; 167*f126890aSEmmanuel Vadot gpio-controller; 168*f126890aSEmmanuel Vadot reg = <0x20 0x10092000 0x00 0x1000>; 169*f126890aSEmmanuel Vadot interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, 170*f126890aSEmmanuel Vadot <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, 171*f126890aSEmmanuel Vadot <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, 172*f126890aSEmmanuel Vadot <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, 173*f126890aSEmmanuel Vadot <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, 174*f126890aSEmmanuel Vadot <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, 175*f126890aSEmmanuel Vadot <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, 176*f126890aSEmmanuel Vadot <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 177*f126890aSEmmanuel Vadot clocks = <&clks AXXIA_CLK_PER>; 178*f126890aSEmmanuel Vadot clock-names = "apb_pclk"; 179*f126890aSEmmanuel Vadot status = "disabled"; 180*f126890aSEmmanuel Vadot }; 181*f126890aSEmmanuel Vadot 182*f126890aSEmmanuel Vadot gpio1: gpio@2010093000 { 183*f126890aSEmmanuel Vadot #gpio-cells = <2>; 184*f126890aSEmmanuel Vadot compatible = "arm,pl061", "arm,primecell"; 185*f126890aSEmmanuel Vadot gpio-controller; 186*f126890aSEmmanuel Vadot reg = <0x20 0x10093000 0x00 0x1000>; 187*f126890aSEmmanuel Vadot interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>; 188*f126890aSEmmanuel Vadot clocks = <&clks AXXIA_CLK_PER>; 189*f126890aSEmmanuel Vadot clock-names = "apb_pclk"; 190*f126890aSEmmanuel Vadot status = "disabled"; 191*f126890aSEmmanuel Vadot }; 192*f126890aSEmmanuel Vadot }; 193*f126890aSEmmanuel Vadot }; 194*f126890aSEmmanuel Vadot}; 195*f126890aSEmmanuel Vadot 196*f126890aSEmmanuel Vadot/* 197*f126890aSEmmanuel Vadot Local Variables: 198*f126890aSEmmanuel Vadot mode: C 199*f126890aSEmmanuel Vadot End: 200*f126890aSEmmanuel Vadot*/ 201