xref: /freebsd-src/sys/contrib/device-tree/src/arm/hisilicon/hip04-d01.dts (revision f126890ac5386406dadf7c4cfa9566cbb56537c5) 
1*f126890aSEmmanuel Vadot// SPDX-License-Identifier: GPL-2.0-only
2*f126890aSEmmanuel Vadot/*
3*f126890aSEmmanuel Vadot *  Copyright (C) 2013-2014 Linaro Ltd.
4*f126890aSEmmanuel Vadot *  Author: Haojian Zhuang <haojian.zhuang@linaro.org>
5*f126890aSEmmanuel Vadot */
6*f126890aSEmmanuel Vadot
7*f126890aSEmmanuel Vadot/dts-v1/;
8*f126890aSEmmanuel Vadot
9*f126890aSEmmanuel Vadot#include "hip04.dtsi"
10*f126890aSEmmanuel Vadot
11*f126890aSEmmanuel Vadot/ {
12*f126890aSEmmanuel Vadot	/* memory bus is 64-bit */
13*f126890aSEmmanuel Vadot	#address-cells = <2>;
14*f126890aSEmmanuel Vadot	#size-cells = <2>;
15*f126890aSEmmanuel Vadot	model = "Hisilicon D01 Development Board";
16*f126890aSEmmanuel Vadot	compatible = "hisilicon,hip04-d01";
17*f126890aSEmmanuel Vadot
18*f126890aSEmmanuel Vadot	memory@0,10000000 {
19*f126890aSEmmanuel Vadot		device_type = "memory";
20*f126890aSEmmanuel Vadot		reg = <0x00000000 0x10000000 0x00000000 0xc0000000>,
21*f126890aSEmmanuel Vadot		      <0x00000004 0xc0000000 0x00000003 0x40000000>;
22*f126890aSEmmanuel Vadot	};
23*f126890aSEmmanuel Vadot
24*f126890aSEmmanuel Vadot	soc {
25*f126890aSEmmanuel Vadot		uart0: serial@4007000 {
26*f126890aSEmmanuel Vadot			status = "okay";
27*f126890aSEmmanuel Vadot		};
28*f126890aSEmmanuel Vadot	};
29*f126890aSEmmanuel Vadot};
30