xref: /freebsd-src/sys/contrib/device-tree/include/dt-bindings/reset/airoha,en7581-reset.h (revision 0e8011faf58b743cc652e3b2ad0f7671227610df)
1*0e8011faSEmmanuel Vadot // SPDX-License-Identifier: GPL-2.0-only
2*0e8011faSEmmanuel Vadot /*
3*0e8011faSEmmanuel Vadot  * Copyright (c) 2024 AIROHA Inc
4*0e8011faSEmmanuel Vadot  * Author: Lorenzo Bianconi <lorenzo@kernel.org>
5*0e8011faSEmmanuel Vadot  */
6*0e8011faSEmmanuel Vadot 
7*0e8011faSEmmanuel Vadot #ifndef __DT_BINDINGS_RESET_CONTROLLER_AIROHA_EN7581_H_
8*0e8011faSEmmanuel Vadot #define __DT_BINDINGS_RESET_CONTROLLER_AIROHA_EN7581_H_
9*0e8011faSEmmanuel Vadot 
10*0e8011faSEmmanuel Vadot /* RST_CTRL2 */
11*0e8011faSEmmanuel Vadot #define EN7581_XPON_PHY_RST		 0
12*0e8011faSEmmanuel Vadot #define EN7581_CPU_TIMER2_RST		 1
13*0e8011faSEmmanuel Vadot #define EN7581_HSUART_RST		 2
14*0e8011faSEmmanuel Vadot #define EN7581_UART4_RST		 3
15*0e8011faSEmmanuel Vadot #define EN7581_UART5_RST		 4
16*0e8011faSEmmanuel Vadot #define EN7581_I2C2_RST			 5
17*0e8011faSEmmanuel Vadot #define EN7581_XSI_MAC_RST		 6
18*0e8011faSEmmanuel Vadot #define EN7581_XSI_PHY_RST		 7
19*0e8011faSEmmanuel Vadot #define EN7581_NPU_RST			 8
20*0e8011faSEmmanuel Vadot #define EN7581_I2S_RST			 9
21*0e8011faSEmmanuel Vadot #define EN7581_TRNG_RST			10
22*0e8011faSEmmanuel Vadot #define EN7581_TRNG_MSTART_RST		11
23*0e8011faSEmmanuel Vadot #define EN7581_DUAL_HSI0_RST		12
24*0e8011faSEmmanuel Vadot #define EN7581_DUAL_HSI1_RST		13
25*0e8011faSEmmanuel Vadot #define EN7581_HSI_RST			14
26*0e8011faSEmmanuel Vadot #define EN7581_DUAL_HSI0_MAC_RST	15
27*0e8011faSEmmanuel Vadot #define EN7581_DUAL_HSI1_MAC_RST	16
28*0e8011faSEmmanuel Vadot #define EN7581_HSI_MAC_RST		17
29*0e8011faSEmmanuel Vadot #define EN7581_WDMA_RST			18
30*0e8011faSEmmanuel Vadot #define EN7581_WOE0_RST			19
31*0e8011faSEmmanuel Vadot #define EN7581_WOE1_RST			20
32*0e8011faSEmmanuel Vadot #define EN7581_HSDMA_RST		21
33*0e8011faSEmmanuel Vadot #define EN7581_TDMA_RST			22
34*0e8011faSEmmanuel Vadot #define EN7581_EMMC_RST			23
35*0e8011faSEmmanuel Vadot #define EN7581_SOE_RST			24
36*0e8011faSEmmanuel Vadot #define EN7581_PCIE2_RST		25
37*0e8011faSEmmanuel Vadot #define EN7581_XFP_MAC_RST		26
38*0e8011faSEmmanuel Vadot #define EN7581_USB_HOST_P1_RST		27
39*0e8011faSEmmanuel Vadot #define EN7581_USB_HOST_P1_U3_PHY_RST	28
40*0e8011faSEmmanuel Vadot /* RST_CTRL1 */
41*0e8011faSEmmanuel Vadot #define EN7581_PCM1_ZSI_ISI_RST		29
42*0e8011faSEmmanuel Vadot #define EN7581_FE_PDMA_RST		30
43*0e8011faSEmmanuel Vadot #define EN7581_FE_QDMA_RST		31
44*0e8011faSEmmanuel Vadot #define EN7581_PCM_SPIWP_RST		32
45*0e8011faSEmmanuel Vadot #define EN7581_CRYPTO_RST		33
46*0e8011faSEmmanuel Vadot #define EN7581_TIMER_RST		34
47*0e8011faSEmmanuel Vadot #define EN7581_PCM1_RST			35
48*0e8011faSEmmanuel Vadot #define EN7581_UART_RST			36
49*0e8011faSEmmanuel Vadot #define EN7581_GPIO_RST			37
50*0e8011faSEmmanuel Vadot #define EN7581_GDMA_RST			38
51*0e8011faSEmmanuel Vadot #define EN7581_I2C_MASTER_RST		39
52*0e8011faSEmmanuel Vadot #define EN7581_PCM2_ZSI_ISI_RST		40
53*0e8011faSEmmanuel Vadot #define EN7581_SFC_RST			41
54*0e8011faSEmmanuel Vadot #define EN7581_UART2_RST		42
55*0e8011faSEmmanuel Vadot #define EN7581_GDMP_RST			43
56*0e8011faSEmmanuel Vadot #define EN7581_FE_RST			44
57*0e8011faSEmmanuel Vadot #define EN7581_USB_HOST_P0_RST		45
58*0e8011faSEmmanuel Vadot #define EN7581_GSW_RST			46
59*0e8011faSEmmanuel Vadot #define EN7581_SFC2_PCM_RST		47
60*0e8011faSEmmanuel Vadot #define EN7581_PCIE0_RST		48
61*0e8011faSEmmanuel Vadot #define EN7581_PCIE1_RST		49
62*0e8011faSEmmanuel Vadot #define EN7581_CPU_TIMER_RST		50
63*0e8011faSEmmanuel Vadot #define EN7581_PCIE_HB_RST		51
64*0e8011faSEmmanuel Vadot #define EN7581_XPON_MAC_RST		52
65*0e8011faSEmmanuel Vadot 
66*0e8011faSEmmanuel Vadot #endif /* __DT_BINDINGS_RESET_CONTROLLER_AIROHA_EN7581_H_ */
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