1*c66ec88fSEmmanuel Vadot /* SPDX-License-Identifier: GPL-2.0 */ 2*c66ec88fSEmmanuel Vadot /* 3*c66ec88fSEmmanuel Vadot * Copyright (c) 2019 MediaTek Inc. 4*c66ec88fSEmmanuel Vadot * Author: Yong Liang <yong.liang@mediatek.com> 5*c66ec88fSEmmanuel Vadot */ 6*c66ec88fSEmmanuel Vadot 7*c66ec88fSEmmanuel Vadot #ifndef _DT_BINDINGS_RESET_CONTROLLER_MT2712 8*c66ec88fSEmmanuel Vadot #define _DT_BINDINGS_RESET_CONTROLLER_MT2712 9*c66ec88fSEmmanuel Vadot 10*c66ec88fSEmmanuel Vadot #define MT2712_TOPRGU_INFRA_SW_RST 0 11*c66ec88fSEmmanuel Vadot #define MT2712_TOPRGU_MM_SW_RST 1 12*c66ec88fSEmmanuel Vadot #define MT2712_TOPRGU_MFG_SW_RST 2 13*c66ec88fSEmmanuel Vadot #define MT2712_TOPRGU_VENC_SW_RST 3 14*c66ec88fSEmmanuel Vadot #define MT2712_TOPRGU_VDEC_SW_RST 4 15*c66ec88fSEmmanuel Vadot #define MT2712_TOPRGU_IMG_SW_RST 5 16*c66ec88fSEmmanuel Vadot #define MT2712_TOPRGU_INFRA_AO_SW_RST 8 17*c66ec88fSEmmanuel Vadot #define MT2712_TOPRGU_USB_SW_RST 9 18*c66ec88fSEmmanuel Vadot #define MT2712_TOPRGU_APMIXED_SW_RST 10 19*c66ec88fSEmmanuel Vadot 20*c66ec88fSEmmanuel Vadot #define MT2712_TOPRGU_SW_RST_NUM 11 21*c66ec88fSEmmanuel Vadot 22*c66ec88fSEmmanuel Vadot #endif /* _DT_BINDINGS_RESET_CONTROLLER_MT2712 */ 23