xref: /freebsd-src/sys/contrib/device-tree/include/dt-bindings/power/xlnx-zynqmp-power.h (revision 8bab661a3316d8bd9b9fbd11a3b4371b91507bd2)
1c66ec88fSEmmanuel Vadot /* SPDX-License-Identifier: GPL-2.0 */
2c66ec88fSEmmanuel Vadot /*
3c66ec88fSEmmanuel Vadot  *  Copyright (C) 2018 Xilinx, Inc.
4c66ec88fSEmmanuel Vadot  */
5c66ec88fSEmmanuel Vadot 
6c66ec88fSEmmanuel Vadot #ifndef _DT_BINDINGS_ZYNQMP_POWER_H
7c66ec88fSEmmanuel Vadot #define _DT_BINDINGS_ZYNQMP_POWER_H
8c66ec88fSEmmanuel Vadot 
9*8bab661aSEmmanuel Vadot #define		PD_RPU_0	7
10*8bab661aSEmmanuel Vadot #define		PD_RPU_1	8
11*8bab661aSEmmanuel Vadot #define		PD_R5_0_ATCM	15
12*8bab661aSEmmanuel Vadot #define		PD_R5_0_BTCM	16
13*8bab661aSEmmanuel Vadot #define		PD_R5_1_ATCM	17
14*8bab661aSEmmanuel Vadot #define		PD_R5_1_BTCM	18
15c66ec88fSEmmanuel Vadot #define		PD_USB_0	22
16c66ec88fSEmmanuel Vadot #define		PD_USB_1	23
17c66ec88fSEmmanuel Vadot #define		PD_TTC_0	24
18c66ec88fSEmmanuel Vadot #define		PD_TTC_1	25
19c66ec88fSEmmanuel Vadot #define		PD_TTC_2	26
20c66ec88fSEmmanuel Vadot #define		PD_TTC_3	27
21c66ec88fSEmmanuel Vadot #define		PD_SATA		28
22c66ec88fSEmmanuel Vadot #define		PD_ETH_0	29
23c66ec88fSEmmanuel Vadot #define		PD_ETH_1	30
24c66ec88fSEmmanuel Vadot #define		PD_ETH_2	31
25c66ec88fSEmmanuel Vadot #define		PD_ETH_3	32
26c66ec88fSEmmanuel Vadot #define		PD_UART_0	33
27c66ec88fSEmmanuel Vadot #define		PD_UART_1	34
28c66ec88fSEmmanuel Vadot #define		PD_SPI_0	35
29c66ec88fSEmmanuel Vadot #define		PD_SPI_1	36
30c66ec88fSEmmanuel Vadot #define		PD_I2C_0	37
31c66ec88fSEmmanuel Vadot #define		PD_I2C_1	38
32c66ec88fSEmmanuel Vadot #define		PD_SD_0		39
33c66ec88fSEmmanuel Vadot #define		PD_SD_1		40
34c66ec88fSEmmanuel Vadot #define		PD_DP		41
35c66ec88fSEmmanuel Vadot #define		PD_GDMA		42
36c66ec88fSEmmanuel Vadot #define		PD_ADMA		43
37c66ec88fSEmmanuel Vadot #define		PD_NAND		44
38c66ec88fSEmmanuel Vadot #define		PD_QSPI		45
39c66ec88fSEmmanuel Vadot #define		PD_GPIO		46
40c66ec88fSEmmanuel Vadot #define		PD_CAN_0	47
41c66ec88fSEmmanuel Vadot #define		PD_CAN_1	48
42c66ec88fSEmmanuel Vadot #define		PD_GPU		58
43c66ec88fSEmmanuel Vadot #define		PD_PCIE		59
44c66ec88fSEmmanuel Vadot 
45c66ec88fSEmmanuel Vadot #endif
46