1*c66ec88fSEmmanuel Vadot /* SPDX-License-Identifier: GPL-2.0-only */ 2*c66ec88fSEmmanuel Vadot /* 3*c66ec88fSEmmanuel Vadot * This header provides constants for DRA pinctrl bindings. 4*c66ec88fSEmmanuel Vadot * 5*c66ec88fSEmmanuel Vadot * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ 6*c66ec88fSEmmanuel Vadot * Author: Rajendra Nayak <rnayak@ti.com> 7*c66ec88fSEmmanuel Vadot */ 8*c66ec88fSEmmanuel Vadot 9*c66ec88fSEmmanuel Vadot #ifndef _DT_BINDINGS_PINCTRL_DRA_H 10*c66ec88fSEmmanuel Vadot #define _DT_BINDINGS_PINCTRL_DRA_H 11*c66ec88fSEmmanuel Vadot 12*c66ec88fSEmmanuel Vadot /* DRA7 mux mode options for each pin. See TRM for options */ 13*c66ec88fSEmmanuel Vadot #define MUX_MODE0 0x0 14*c66ec88fSEmmanuel Vadot #define MUX_MODE1 0x1 15*c66ec88fSEmmanuel Vadot #define MUX_MODE2 0x2 16*c66ec88fSEmmanuel Vadot #define MUX_MODE3 0x3 17*c66ec88fSEmmanuel Vadot #define MUX_MODE4 0x4 18*c66ec88fSEmmanuel Vadot #define MUX_MODE5 0x5 19*c66ec88fSEmmanuel Vadot #define MUX_MODE6 0x6 20*c66ec88fSEmmanuel Vadot #define MUX_MODE7 0x7 21*c66ec88fSEmmanuel Vadot #define MUX_MODE8 0x8 22*c66ec88fSEmmanuel Vadot #define MUX_MODE9 0x9 23*c66ec88fSEmmanuel Vadot #define MUX_MODE10 0xa 24*c66ec88fSEmmanuel Vadot #define MUX_MODE11 0xb 25*c66ec88fSEmmanuel Vadot #define MUX_MODE12 0xc 26*c66ec88fSEmmanuel Vadot #define MUX_MODE13 0xd 27*c66ec88fSEmmanuel Vadot #define MUX_MODE14 0xe 28*c66ec88fSEmmanuel Vadot #define MUX_MODE15 0xf 29*c66ec88fSEmmanuel Vadot 30*c66ec88fSEmmanuel Vadot /* Certain pins need virtual mode, but note: they may glitch */ 31*c66ec88fSEmmanuel Vadot #define MUX_VIRTUAL_MODE0 (MODE_SELECT | (0x0 << 4)) 32*c66ec88fSEmmanuel Vadot #define MUX_VIRTUAL_MODE1 (MODE_SELECT | (0x1 << 4)) 33*c66ec88fSEmmanuel Vadot #define MUX_VIRTUAL_MODE2 (MODE_SELECT | (0x2 << 4)) 34*c66ec88fSEmmanuel Vadot #define MUX_VIRTUAL_MODE3 (MODE_SELECT | (0x3 << 4)) 35*c66ec88fSEmmanuel Vadot #define MUX_VIRTUAL_MODE4 (MODE_SELECT | (0x4 << 4)) 36*c66ec88fSEmmanuel Vadot #define MUX_VIRTUAL_MODE5 (MODE_SELECT | (0x5 << 4)) 37*c66ec88fSEmmanuel Vadot #define MUX_VIRTUAL_MODE6 (MODE_SELECT | (0x6 << 4)) 38*c66ec88fSEmmanuel Vadot #define MUX_VIRTUAL_MODE7 (MODE_SELECT | (0x7 << 4)) 39*c66ec88fSEmmanuel Vadot #define MUX_VIRTUAL_MODE8 (MODE_SELECT | (0x8 << 4)) 40*c66ec88fSEmmanuel Vadot #define MUX_VIRTUAL_MODE9 (MODE_SELECT | (0x9 << 4)) 41*c66ec88fSEmmanuel Vadot #define MUX_VIRTUAL_MODE10 (MODE_SELECT | (0xa << 4)) 42*c66ec88fSEmmanuel Vadot #define MUX_VIRTUAL_MODE11 (MODE_SELECT | (0xb << 4)) 43*c66ec88fSEmmanuel Vadot #define MUX_VIRTUAL_MODE12 (MODE_SELECT | (0xc << 4)) 44*c66ec88fSEmmanuel Vadot #define MUX_VIRTUAL_MODE13 (MODE_SELECT | (0xd << 4)) 45*c66ec88fSEmmanuel Vadot #define MUX_VIRTUAL_MODE14 (MODE_SELECT | (0xe << 4)) 46*c66ec88fSEmmanuel Vadot #define MUX_VIRTUAL_MODE15 (MODE_SELECT | (0xf << 4)) 47*c66ec88fSEmmanuel Vadot 48*c66ec88fSEmmanuel Vadot #define MODE_SELECT (1 << 8) 49*c66ec88fSEmmanuel Vadot 50*c66ec88fSEmmanuel Vadot #define PULL_ENA (0 << 16) 51*c66ec88fSEmmanuel Vadot #define PULL_DIS (1 << 16) 52*c66ec88fSEmmanuel Vadot #define PULL_UP (1 << 17) 53*c66ec88fSEmmanuel Vadot #define INPUT_EN (1 << 18) 54*c66ec88fSEmmanuel Vadot #define SLEWCONTROL (1 << 19) 55*c66ec88fSEmmanuel Vadot #define WAKEUP_EN (1 << 24) 56*c66ec88fSEmmanuel Vadot #define WAKEUP_EVENT (1 << 25) 57*c66ec88fSEmmanuel Vadot 58*c66ec88fSEmmanuel Vadot /* Active pin states */ 59*c66ec88fSEmmanuel Vadot #define PIN_OUTPUT (0 | PULL_DIS) 60*c66ec88fSEmmanuel Vadot #define PIN_OUTPUT_PULLUP (PULL_UP) 61*c66ec88fSEmmanuel Vadot #define PIN_OUTPUT_PULLDOWN (0) 62*c66ec88fSEmmanuel Vadot #define PIN_INPUT (INPUT_EN | PULL_DIS) 63*c66ec88fSEmmanuel Vadot #define PIN_INPUT_SLEW (INPUT_EN | SLEWCONTROL) 64*c66ec88fSEmmanuel Vadot #define PIN_INPUT_PULLUP (PULL_ENA | INPUT_EN | PULL_UP) 65*c66ec88fSEmmanuel Vadot #define PIN_INPUT_PULLDOWN (PULL_ENA | INPUT_EN) 66*c66ec88fSEmmanuel Vadot 67*c66ec88fSEmmanuel Vadot /* 68*c66ec88fSEmmanuel Vadot * Macro to allow using the absolute physical address instead of the 69*c66ec88fSEmmanuel Vadot * padconf registers instead of the offset from padconf base. 70*c66ec88fSEmmanuel Vadot */ 71*c66ec88fSEmmanuel Vadot #define DRA7XX_CORE_IOPAD(pa, val) (((pa) & 0xffff) - 0x3400) (val) 72*c66ec88fSEmmanuel Vadot 73*c66ec88fSEmmanuel Vadot /* DRA7 IODELAY configuration parameters */ 74*c66ec88fSEmmanuel Vadot #define A_DELAY_PS(val) ((val) & 0xffff) 75*c66ec88fSEmmanuel Vadot #define G_DELAY_PS(val) ((val) & 0xffff) 76*c66ec88fSEmmanuel Vadot #endif 77*c66ec88fSEmmanuel Vadot 78