xref: /freebsd-src/sys/contrib/device-tree/include/dt-bindings/net/ti-dp83869.h (revision 7d0873ebb83b19ba1e8a89e679470d885efe12e3)
1*7d0873ebSEmmanuel Vadot /* SPDX-License-Identifier: GPL-2.0-only OR MIT */
2c66ec88fSEmmanuel Vadot /*
3c66ec88fSEmmanuel Vadot  * Device Tree constants for the Texas Instruments DP83869 PHY
4c66ec88fSEmmanuel Vadot  *
5c66ec88fSEmmanuel Vadot  * Author: Dan Murphy <dmurphy@ti.com>
6c66ec88fSEmmanuel Vadot  *
7*7d0873ebSEmmanuel Vadot  * Copyright (C) 2015-2024 Texas Instruments Incorporated - https://www.ti.com/
8c66ec88fSEmmanuel Vadot  */
9c66ec88fSEmmanuel Vadot 
10c66ec88fSEmmanuel Vadot #ifndef _DT_BINDINGS_TI_DP83869_H
11c66ec88fSEmmanuel Vadot #define _DT_BINDINGS_TI_DP83869_H
12c66ec88fSEmmanuel Vadot 
13c66ec88fSEmmanuel Vadot /* PHY CTRL bits */
14c66ec88fSEmmanuel Vadot #define DP83869_PHYCR_FIFO_DEPTH_3_B_NIB	0x00
15c66ec88fSEmmanuel Vadot #define DP83869_PHYCR_FIFO_DEPTH_4_B_NIB	0x01
16c66ec88fSEmmanuel Vadot #define DP83869_PHYCR_FIFO_DEPTH_6_B_NIB	0x02
17c66ec88fSEmmanuel Vadot #define DP83869_PHYCR_FIFO_DEPTH_8_B_NIB	0x03
18c66ec88fSEmmanuel Vadot 
19c66ec88fSEmmanuel Vadot /* IO_MUX_CFG - Clock output selection */
20c66ec88fSEmmanuel Vadot #define DP83869_CLK_O_SEL_CHN_A_RCLK		0x0
21c66ec88fSEmmanuel Vadot #define DP83869_CLK_O_SEL_CHN_B_RCLK		0x1
22c66ec88fSEmmanuel Vadot #define DP83869_CLK_O_SEL_CHN_C_RCLK		0x2
23c66ec88fSEmmanuel Vadot #define DP83869_CLK_O_SEL_CHN_D_RCLK		0x3
24c66ec88fSEmmanuel Vadot #define DP83869_CLK_O_SEL_CHN_A_RCLK_DIV5	0x4
25c66ec88fSEmmanuel Vadot #define DP83869_CLK_O_SEL_CHN_B_RCLK_DIV5	0x5
26c66ec88fSEmmanuel Vadot #define DP83869_CLK_O_SEL_CHN_C_RCLK_DIV5	0x6
27c66ec88fSEmmanuel Vadot #define DP83869_CLK_O_SEL_CHN_D_RCLK_DIV5	0x7
28c66ec88fSEmmanuel Vadot #define DP83869_CLK_O_SEL_CHN_A_TCLK		0x8
29c66ec88fSEmmanuel Vadot #define DP83869_CLK_O_SEL_CHN_B_TCLK		0x9
30c66ec88fSEmmanuel Vadot #define DP83869_CLK_O_SEL_CHN_C_TCLK		0xa
31c66ec88fSEmmanuel Vadot #define DP83869_CLK_O_SEL_CHN_D_TCLK		0xb
32c66ec88fSEmmanuel Vadot #define DP83869_CLK_O_SEL_REF_CLK		0xc
33c66ec88fSEmmanuel Vadot 
34c66ec88fSEmmanuel Vadot #define DP83869_RGMII_COPPER_ETHERNET		0x00
35c66ec88fSEmmanuel Vadot #define DP83869_RGMII_1000_BASE			0x01
36c66ec88fSEmmanuel Vadot #define DP83869_RGMII_100_BASE			0x02
37c66ec88fSEmmanuel Vadot #define DP83869_RGMII_SGMII_BRIDGE		0x03
38c66ec88fSEmmanuel Vadot #define DP83869_1000M_MEDIA_CONVERT		0x04
39c66ec88fSEmmanuel Vadot #define DP83869_100M_MEDIA_CONVERT		0x05
40c66ec88fSEmmanuel Vadot #define DP83869_SGMII_COPPER_ETHERNET		0x06
41c66ec88fSEmmanuel Vadot 
42c66ec88fSEmmanuel Vadot #endif
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