xref: /freebsd-src/sys/contrib/device-tree/include/dt-bindings/media/xilinx-vip.h (revision c66ec88fed842fbaad62c30d510644ceb7bd2d71)
1*c66ec88fSEmmanuel Vadot // SPDX-License-Identifier: GPL-2.0
2*c66ec88fSEmmanuel Vadot /*
3*c66ec88fSEmmanuel Vadot  * Xilinx Video IP Core
4*c66ec88fSEmmanuel Vadot  *
5*c66ec88fSEmmanuel Vadot  * Copyright (C) 2013-2015 Ideas on Board
6*c66ec88fSEmmanuel Vadot  * Copyright (C) 2013-2015 Xilinx, Inc.
7*c66ec88fSEmmanuel Vadot  *
8*c66ec88fSEmmanuel Vadot  * Contacts: Hyun Kwon <hyun.kwon@xilinx.com>
9*c66ec88fSEmmanuel Vadot  *           Laurent Pinchart <laurent.pinchart@ideasonboard.com>
10*c66ec88fSEmmanuel Vadot  */
11*c66ec88fSEmmanuel Vadot 
12*c66ec88fSEmmanuel Vadot #ifndef __DT_BINDINGS_MEDIA_XILINX_VIP_H__
13*c66ec88fSEmmanuel Vadot #define __DT_BINDINGS_MEDIA_XILINX_VIP_H__
14*c66ec88fSEmmanuel Vadot 
15*c66ec88fSEmmanuel Vadot /*
16*c66ec88fSEmmanuel Vadot  * Video format codes as defined in "AXI4-Stream Video IP and System Design
17*c66ec88fSEmmanuel Vadot  * Guide".
18*c66ec88fSEmmanuel Vadot  */
19*c66ec88fSEmmanuel Vadot #define XVIP_VF_YUV_422			0
20*c66ec88fSEmmanuel Vadot #define XVIP_VF_YUV_444			1
21*c66ec88fSEmmanuel Vadot #define XVIP_VF_RBG			2
22*c66ec88fSEmmanuel Vadot #define XVIP_VF_YUV_420			3
23*c66ec88fSEmmanuel Vadot #define XVIP_VF_YUVA_422		4
24*c66ec88fSEmmanuel Vadot #define XVIP_VF_YUVA_444		5
25*c66ec88fSEmmanuel Vadot #define XVIP_VF_RGBA			6
26*c66ec88fSEmmanuel Vadot #define XVIP_VF_YUVA_420		7
27*c66ec88fSEmmanuel Vadot #define XVIP_VF_YUVD_422		8
28*c66ec88fSEmmanuel Vadot #define XVIP_VF_YUVD_444		9
29*c66ec88fSEmmanuel Vadot #define XVIP_VF_RGBD			10
30*c66ec88fSEmmanuel Vadot #define XVIP_VF_YUVD_420		11
31*c66ec88fSEmmanuel Vadot #define XVIP_VF_MONO_SENSOR		12
32*c66ec88fSEmmanuel Vadot #define XVIP_VF_CUSTOM2			13
33*c66ec88fSEmmanuel Vadot #define XVIP_VF_CUSTOM3			14
34*c66ec88fSEmmanuel Vadot #define XVIP_VF_CUSTOM4			15
35*c66ec88fSEmmanuel Vadot 
36*c66ec88fSEmmanuel Vadot #endif /* __DT_BINDINGS_MEDIA_XILINX_VIP_H__ */
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