1*c66ec88fSEmmanuel Vadot /* SPDX-License-Identifier: GPL-2.0+ */ 2*c66ec88fSEmmanuel Vadot 3*c66ec88fSEmmanuel Vadot #ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_ASPEED_SCU_IC_H_ 4*c66ec88fSEmmanuel Vadot #define _DT_BINDINGS_INTERRUPT_CONTROLLER_ASPEED_SCU_IC_H_ 5*c66ec88fSEmmanuel Vadot 6*c66ec88fSEmmanuel Vadot #define ASPEED_SCU_IC_VGA_CURSOR_CHANGE 0 7*c66ec88fSEmmanuel Vadot #define ASPEED_SCU_IC_VGA_SCRATCH_REG_CHANGE 1 8*c66ec88fSEmmanuel Vadot 9*c66ec88fSEmmanuel Vadot #define ASPEED_AST2500_SCU_IC_PCIE_RESET_LO_TO_HI 2 10*c66ec88fSEmmanuel Vadot #define ASPEED_AST2500_SCU_IC_PCIE_RESET_HI_TO_LO 3 11*c66ec88fSEmmanuel Vadot #define ASPEED_AST2500_SCU_IC_LPC_RESET_LO_TO_HI 4 12*c66ec88fSEmmanuel Vadot #define ASPEED_AST2500_SCU_IC_LPC_RESET_HI_TO_LO 5 13*c66ec88fSEmmanuel Vadot #define ASPEED_AST2500_SCU_IC_ISSUE_MSI 6 14*c66ec88fSEmmanuel Vadot 15*c66ec88fSEmmanuel Vadot #define ASPEED_AST2600_SCU_IC0_PCIE_PERST_LO_TO_HI 2 16*c66ec88fSEmmanuel Vadot #define ASPEED_AST2600_SCU_IC0_PCIE_PERST_HI_TO_LO 3 17*c66ec88fSEmmanuel Vadot #define ASPEED_AST2600_SCU_IC0_PCIE_RCRST_LO_TO_HI 4 18*c66ec88fSEmmanuel Vadot #define ASPEED_AST2600_SCU_IC0_PCIE_RCRST_HI_TO_LO 5 19*c66ec88fSEmmanuel Vadot 20*c66ec88fSEmmanuel Vadot #define ASPEED_AST2600_SCU_IC1_LPC_RESET_LO_TO_HI 0 21*c66ec88fSEmmanuel Vadot #define ASPEED_AST2600_SCU_IC1_LPC_RESET_HI_TO_LO 1 22*c66ec88fSEmmanuel Vadot 23*c66ec88fSEmmanuel Vadot #endif /* _DT_BINDINGS_INTERRUPT_CONTROLLER_ASPEED_SCU_IC_H_ */ 24