1*c66ec88fSEmmanuel Vadot /* SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) */ 2*c66ec88fSEmmanuel Vadot /* 3*c66ec88fSEmmanuel Vadot * Qualcomm msm8974 interconnect IDs 4*c66ec88fSEmmanuel Vadot * 5*c66ec88fSEmmanuel Vadot * Copyright (c) 2019 Brian Masney <masneyb@onstation.org> 6*c66ec88fSEmmanuel Vadot */ 7*c66ec88fSEmmanuel Vadot 8*c66ec88fSEmmanuel Vadot #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_MSM8974_H 9*c66ec88fSEmmanuel Vadot #define __DT_BINDINGS_INTERCONNECT_QCOM_MSM8974_H 10*c66ec88fSEmmanuel Vadot 11*c66ec88fSEmmanuel Vadot #define BIMC_MAS_AMPSS_M0 0 12*c66ec88fSEmmanuel Vadot #define BIMC_MAS_AMPSS_M1 1 13*c66ec88fSEmmanuel Vadot #define BIMC_MAS_MSS_PROC 2 14*c66ec88fSEmmanuel Vadot #define BIMC_TO_MNOC 3 15*c66ec88fSEmmanuel Vadot #define BIMC_TO_SNOC 4 16*c66ec88fSEmmanuel Vadot #define BIMC_SLV_EBI_CH0 5 17*c66ec88fSEmmanuel Vadot #define BIMC_SLV_AMPSS_L2 6 18*c66ec88fSEmmanuel Vadot 19*c66ec88fSEmmanuel Vadot #define CNOC_MAS_RPM_INST 0 20*c66ec88fSEmmanuel Vadot #define CNOC_MAS_RPM_DATA 1 21*c66ec88fSEmmanuel Vadot #define CNOC_MAS_RPM_SYS 2 22*c66ec88fSEmmanuel Vadot #define CNOC_MAS_DEHR 3 23*c66ec88fSEmmanuel Vadot #define CNOC_MAS_QDSS_DAP 4 24*c66ec88fSEmmanuel Vadot #define CNOC_MAS_SPDM 5 25*c66ec88fSEmmanuel Vadot #define CNOC_MAS_TIC 6 26*c66ec88fSEmmanuel Vadot #define CNOC_SLV_CLK_CTL 7 27*c66ec88fSEmmanuel Vadot #define CNOC_SLV_CNOC_MSS 8 28*c66ec88fSEmmanuel Vadot #define CNOC_SLV_SECURITY 9 29*c66ec88fSEmmanuel Vadot #define CNOC_SLV_TCSR 10 30*c66ec88fSEmmanuel Vadot #define CNOC_SLV_TLMM 11 31*c66ec88fSEmmanuel Vadot #define CNOC_SLV_CRYPTO_0_CFG 12 32*c66ec88fSEmmanuel Vadot #define CNOC_SLV_CRYPTO_1_CFG 13 33*c66ec88fSEmmanuel Vadot #define CNOC_SLV_IMEM_CFG 14 34*c66ec88fSEmmanuel Vadot #define CNOC_SLV_MESSAGE_RAM 15 35*c66ec88fSEmmanuel Vadot #define CNOC_SLV_BIMC_CFG 16 36*c66ec88fSEmmanuel Vadot #define CNOC_SLV_BOOT_ROM 17 37*c66ec88fSEmmanuel Vadot #define CNOC_SLV_PMIC_ARB 18 38*c66ec88fSEmmanuel Vadot #define CNOC_SLV_SPDM_WRAPPER 19 39*c66ec88fSEmmanuel Vadot #define CNOC_SLV_DEHR_CFG 20 40*c66ec88fSEmmanuel Vadot #define CNOC_SLV_MPM 21 41*c66ec88fSEmmanuel Vadot #define CNOC_SLV_QDSS_CFG 22 42*c66ec88fSEmmanuel Vadot #define CNOC_SLV_RBCPR_CFG 23 43*c66ec88fSEmmanuel Vadot #define CNOC_SLV_RBCPR_QDSS_APU_CFG 24 44*c66ec88fSEmmanuel Vadot #define CNOC_TO_SNOC 25 45*c66ec88fSEmmanuel Vadot #define CNOC_SLV_CNOC_ONOC_CFG 26 46*c66ec88fSEmmanuel Vadot #define CNOC_SLV_CNOC_MNOC_MMSS_CFG 27 47*c66ec88fSEmmanuel Vadot #define CNOC_SLV_CNOC_MNOC_CFG 28 48*c66ec88fSEmmanuel Vadot #define CNOC_SLV_PNOC_CFG 29 49*c66ec88fSEmmanuel Vadot #define CNOC_SLV_SNOC_MPU_CFG 30 50*c66ec88fSEmmanuel Vadot #define CNOC_SLV_SNOC_CFG 31 51*c66ec88fSEmmanuel Vadot #define CNOC_SLV_EBI1_DLL_CFG 32 52*c66ec88fSEmmanuel Vadot #define CNOC_SLV_PHY_APU_CFG 33 53*c66ec88fSEmmanuel Vadot #define CNOC_SLV_EBI1_PHY_CFG 34 54*c66ec88fSEmmanuel Vadot #define CNOC_SLV_RPM 35 55*c66ec88fSEmmanuel Vadot #define CNOC_SLV_SERVICE_CNOC 36 56*c66ec88fSEmmanuel Vadot 57*c66ec88fSEmmanuel Vadot #define MNOC_MAS_GRAPHICS_3D 0 58*c66ec88fSEmmanuel Vadot #define MNOC_MAS_JPEG 1 59*c66ec88fSEmmanuel Vadot #define MNOC_MAS_MDP_PORT0 2 60*c66ec88fSEmmanuel Vadot #define MNOC_MAS_VIDEO_P0 3 61*c66ec88fSEmmanuel Vadot #define MNOC_MAS_VIDEO_P1 4 62*c66ec88fSEmmanuel Vadot #define MNOC_MAS_VFE 5 63*c66ec88fSEmmanuel Vadot #define MNOC_TO_CNOC 6 64*c66ec88fSEmmanuel Vadot #define MNOC_TO_BIMC 7 65*c66ec88fSEmmanuel Vadot #define MNOC_SLV_CAMERA_CFG 8 66*c66ec88fSEmmanuel Vadot #define MNOC_SLV_DISPLAY_CFG 9 67*c66ec88fSEmmanuel Vadot #define MNOC_SLV_OCMEM_CFG 10 68*c66ec88fSEmmanuel Vadot #define MNOC_SLV_CPR_CFG 11 69*c66ec88fSEmmanuel Vadot #define MNOC_SLV_CPR_XPU_CFG 12 70*c66ec88fSEmmanuel Vadot #define MNOC_SLV_MISC_CFG 13 71*c66ec88fSEmmanuel Vadot #define MNOC_SLV_MISC_XPU_CFG 14 72*c66ec88fSEmmanuel Vadot #define MNOC_SLV_VENUS_CFG 15 73*c66ec88fSEmmanuel Vadot #define MNOC_SLV_GRAPHICS_3D_CFG 16 74*c66ec88fSEmmanuel Vadot #define MNOC_SLV_MMSS_CLK_CFG 17 75*c66ec88fSEmmanuel Vadot #define MNOC_SLV_MMSS_CLK_XPU_CFG 18 76*c66ec88fSEmmanuel Vadot #define MNOC_SLV_MNOC_MPU_CFG 19 77*c66ec88fSEmmanuel Vadot #define MNOC_SLV_ONOC_MPU_CFG 20 78*c66ec88fSEmmanuel Vadot #define MNOC_SLV_SERVICE_MNOC 21 79*c66ec88fSEmmanuel Vadot 80*c66ec88fSEmmanuel Vadot #define OCMEM_NOC_TO_OCMEM_VNOC 0 81*c66ec88fSEmmanuel Vadot #define OCMEM_MAS_JPEG_OCMEM 1 82*c66ec88fSEmmanuel Vadot #define OCMEM_MAS_MDP_OCMEM 2 83*c66ec88fSEmmanuel Vadot #define OCMEM_MAS_VIDEO_P0_OCMEM 3 84*c66ec88fSEmmanuel Vadot #define OCMEM_MAS_VIDEO_P1_OCMEM 4 85*c66ec88fSEmmanuel Vadot #define OCMEM_MAS_VFE_OCMEM 5 86*c66ec88fSEmmanuel Vadot #define OCMEM_MAS_CNOC_ONOC_CFG 6 87*c66ec88fSEmmanuel Vadot #define OCMEM_SLV_SERVICE_ONOC 7 88*c66ec88fSEmmanuel Vadot #define OCMEM_VNOC_TO_SNOC 8 89*c66ec88fSEmmanuel Vadot #define OCMEM_VNOC_TO_OCMEM_NOC 9 90*c66ec88fSEmmanuel Vadot #define OCMEM_VNOC_MAS_GFX3D 10 91*c66ec88fSEmmanuel Vadot #define OCMEM_SLV_OCMEM 11 92*c66ec88fSEmmanuel Vadot 93*c66ec88fSEmmanuel Vadot #define PNOC_MAS_PNOC_CFG 0 94*c66ec88fSEmmanuel Vadot #define PNOC_MAS_SDCC_1 1 95*c66ec88fSEmmanuel Vadot #define PNOC_MAS_SDCC_3 2 96*c66ec88fSEmmanuel Vadot #define PNOC_MAS_SDCC_4 3 97*c66ec88fSEmmanuel Vadot #define PNOC_MAS_SDCC_2 4 98*c66ec88fSEmmanuel Vadot #define PNOC_MAS_TSIF 5 99*c66ec88fSEmmanuel Vadot #define PNOC_MAS_BAM_DMA 6 100*c66ec88fSEmmanuel Vadot #define PNOC_MAS_BLSP_2 7 101*c66ec88fSEmmanuel Vadot #define PNOC_MAS_USB_HSIC 8 102*c66ec88fSEmmanuel Vadot #define PNOC_MAS_BLSP_1 9 103*c66ec88fSEmmanuel Vadot #define PNOC_MAS_USB_HS 10 104*c66ec88fSEmmanuel Vadot #define PNOC_TO_SNOC 11 105*c66ec88fSEmmanuel Vadot #define PNOC_SLV_SDCC_1 12 106*c66ec88fSEmmanuel Vadot #define PNOC_SLV_SDCC_3 13 107*c66ec88fSEmmanuel Vadot #define PNOC_SLV_SDCC_2 14 108*c66ec88fSEmmanuel Vadot #define PNOC_SLV_SDCC_4 15 109*c66ec88fSEmmanuel Vadot #define PNOC_SLV_TSIF 16 110*c66ec88fSEmmanuel Vadot #define PNOC_SLV_BAM_DMA 17 111*c66ec88fSEmmanuel Vadot #define PNOC_SLV_BLSP_2 18 112*c66ec88fSEmmanuel Vadot #define PNOC_SLV_USB_HSIC 19 113*c66ec88fSEmmanuel Vadot #define PNOC_SLV_BLSP_1 20 114*c66ec88fSEmmanuel Vadot #define PNOC_SLV_USB_HS 21 115*c66ec88fSEmmanuel Vadot #define PNOC_SLV_PDM 22 116*c66ec88fSEmmanuel Vadot #define PNOC_SLV_PERIPH_APU_CFG 23 117*c66ec88fSEmmanuel Vadot #define PNOC_SLV_PNOC_MPU_CFG 24 118*c66ec88fSEmmanuel Vadot #define PNOC_SLV_PRNG 25 119*c66ec88fSEmmanuel Vadot #define PNOC_SLV_SERVICE_PNOC 26 120*c66ec88fSEmmanuel Vadot 121*c66ec88fSEmmanuel Vadot #define SNOC_MAS_LPASS_AHB 0 122*c66ec88fSEmmanuel Vadot #define SNOC_MAS_QDSS_BAM 1 123*c66ec88fSEmmanuel Vadot #define SNOC_MAS_SNOC_CFG 2 124*c66ec88fSEmmanuel Vadot #define SNOC_TO_BIMC 3 125*c66ec88fSEmmanuel Vadot #define SNOC_TO_CNOC 4 126*c66ec88fSEmmanuel Vadot #define SNOC_TO_PNOC 5 127*c66ec88fSEmmanuel Vadot #define SNOC_TO_OCMEM_VNOC 6 128*c66ec88fSEmmanuel Vadot #define SNOC_MAS_CRYPTO_CORE0 7 129*c66ec88fSEmmanuel Vadot #define SNOC_MAS_CRYPTO_CORE1 8 130*c66ec88fSEmmanuel Vadot #define SNOC_MAS_LPASS_PROC 9 131*c66ec88fSEmmanuel Vadot #define SNOC_MAS_MSS 10 132*c66ec88fSEmmanuel Vadot #define SNOC_MAS_MSS_NAV 11 133*c66ec88fSEmmanuel Vadot #define SNOC_MAS_OCMEM_DMA 12 134*c66ec88fSEmmanuel Vadot #define SNOC_MAS_WCSS 13 135*c66ec88fSEmmanuel Vadot #define SNOC_MAS_QDSS_ETR 14 136*c66ec88fSEmmanuel Vadot #define SNOC_MAS_USB3 15 137*c66ec88fSEmmanuel Vadot #define SNOC_SLV_AMPSS 16 138*c66ec88fSEmmanuel Vadot #define SNOC_SLV_LPASS 17 139*c66ec88fSEmmanuel Vadot #define SNOC_SLV_USB3 18 140*c66ec88fSEmmanuel Vadot #define SNOC_SLV_WCSS 19 141*c66ec88fSEmmanuel Vadot #define SNOC_SLV_OCIMEM 20 142*c66ec88fSEmmanuel Vadot #define SNOC_SLV_SNOC_OCMEM 21 143*c66ec88fSEmmanuel Vadot #define SNOC_SLV_SERVICE_SNOC 22 144*c66ec88fSEmmanuel Vadot #define SNOC_SLV_QDSS_STM 23 145*c66ec88fSEmmanuel Vadot 146*c66ec88fSEmmanuel Vadot #endif 147