1*c66ec88fSEmmanuel Vadot /* SPDX-License-Identifier: GPL-2.0 */ 2*c66ec88fSEmmanuel Vadot /* 3*c66ec88fSEmmanuel Vadot * Qualcomm interconnect IDs 4*c66ec88fSEmmanuel Vadot * 5*c66ec88fSEmmanuel Vadot * Copyright (c) 2019, Linaro Ltd. 6*c66ec88fSEmmanuel Vadot * Author: Georgi Djakov <georgi.djakov@linaro.org> 7*c66ec88fSEmmanuel Vadot */ 8*c66ec88fSEmmanuel Vadot 9*c66ec88fSEmmanuel Vadot #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_MSM8916_H 10*c66ec88fSEmmanuel Vadot #define __DT_BINDINGS_INTERCONNECT_QCOM_MSM8916_H 11*c66ec88fSEmmanuel Vadot 12*c66ec88fSEmmanuel Vadot #define BIMC_SNOC_SLV 0 13*c66ec88fSEmmanuel Vadot #define MASTER_JPEG 1 14*c66ec88fSEmmanuel Vadot #define MASTER_MDP_PORT0 2 15*c66ec88fSEmmanuel Vadot #define MASTER_QDSS_BAM 3 16*c66ec88fSEmmanuel Vadot #define MASTER_QDSS_ETR 4 17*c66ec88fSEmmanuel Vadot #define MASTER_SNOC_CFG 5 18*c66ec88fSEmmanuel Vadot #define MASTER_VFE 6 19*c66ec88fSEmmanuel Vadot #define MASTER_VIDEO_P0 7 20*c66ec88fSEmmanuel Vadot #define SNOC_MM_INT_0 8 21*c66ec88fSEmmanuel Vadot #define SNOC_MM_INT_1 9 22*c66ec88fSEmmanuel Vadot #define SNOC_MM_INT_2 10 23*c66ec88fSEmmanuel Vadot #define SNOC_MM_INT_BIMC 11 24*c66ec88fSEmmanuel Vadot #define PCNOC_SNOC_SLV 12 25*c66ec88fSEmmanuel Vadot #define SLAVE_APSS 13 26*c66ec88fSEmmanuel Vadot #define SLAVE_CATS_128 14 27*c66ec88fSEmmanuel Vadot #define SLAVE_OCMEM_64 15 28*c66ec88fSEmmanuel Vadot #define SLAVE_IMEM 16 29*c66ec88fSEmmanuel Vadot #define SLAVE_QDSS_STM 17 30*c66ec88fSEmmanuel Vadot #define SLAVE_SRVC_SNOC 18 31*c66ec88fSEmmanuel Vadot #define SNOC_BIMC_0_MAS 19 32*c66ec88fSEmmanuel Vadot #define SNOC_BIMC_1_MAS 20 33*c66ec88fSEmmanuel Vadot #define SNOC_INT_0 21 34*c66ec88fSEmmanuel Vadot #define SNOC_INT_1 22 35*c66ec88fSEmmanuel Vadot #define SNOC_INT_BIMC 23 36*c66ec88fSEmmanuel Vadot #define SNOC_PCNOC_MAS 24 37*c66ec88fSEmmanuel Vadot #define SNOC_QDSS_INT 25 38*c66ec88fSEmmanuel Vadot 39*c66ec88fSEmmanuel Vadot #define BIMC_SNOC_MAS 0 40*c66ec88fSEmmanuel Vadot #define MASTER_AMPSS_M0 1 41*c66ec88fSEmmanuel Vadot #define MASTER_GRAPHICS_3D 2 42*c66ec88fSEmmanuel Vadot #define MASTER_TCU0 3 43*c66ec88fSEmmanuel Vadot #define MASTER_TCU1 4 44*c66ec88fSEmmanuel Vadot #define SLAVE_AMPSS_L2 5 45*c66ec88fSEmmanuel Vadot #define SLAVE_EBI_CH0 6 46*c66ec88fSEmmanuel Vadot #define SNOC_BIMC_0_SLV 7 47*c66ec88fSEmmanuel Vadot #define SNOC_BIMC_1_SLV 8 48*c66ec88fSEmmanuel Vadot 49*c66ec88fSEmmanuel Vadot #define MASTER_BLSP_1 0 50*c66ec88fSEmmanuel Vadot #define MASTER_DEHR 1 51*c66ec88fSEmmanuel Vadot #define MASTER_LPASS 2 52*c66ec88fSEmmanuel Vadot #define MASTER_CRYPTO_CORE0 3 53*c66ec88fSEmmanuel Vadot #define MASTER_SDCC_1 4 54*c66ec88fSEmmanuel Vadot #define MASTER_SDCC_2 5 55*c66ec88fSEmmanuel Vadot #define MASTER_SPDM 6 56*c66ec88fSEmmanuel Vadot #define MASTER_USB_HS 7 57*c66ec88fSEmmanuel Vadot #define PCNOC_INT_0 8 58*c66ec88fSEmmanuel Vadot #define PCNOC_INT_1 9 59*c66ec88fSEmmanuel Vadot #define PCNOC_MAS_0 10 60*c66ec88fSEmmanuel Vadot #define PCNOC_MAS_1 11 61*c66ec88fSEmmanuel Vadot #define PCNOC_SLV_0 12 62*c66ec88fSEmmanuel Vadot #define PCNOC_SLV_1 13 63*c66ec88fSEmmanuel Vadot #define PCNOC_SLV_2 14 64*c66ec88fSEmmanuel Vadot #define PCNOC_SLV_3 15 65*c66ec88fSEmmanuel Vadot #define PCNOC_SLV_4 16 66*c66ec88fSEmmanuel Vadot #define PCNOC_SLV_8 17 67*c66ec88fSEmmanuel Vadot #define PCNOC_SLV_9 18 68*c66ec88fSEmmanuel Vadot #define PCNOC_SNOC_MAS 19 69*c66ec88fSEmmanuel Vadot #define SLAVE_BIMC_CFG 20 70*c66ec88fSEmmanuel Vadot #define SLAVE_BLSP_1 21 71*c66ec88fSEmmanuel Vadot #define SLAVE_BOOT_ROM 22 72*c66ec88fSEmmanuel Vadot #define SLAVE_CAMERA_CFG 23 73*c66ec88fSEmmanuel Vadot #define SLAVE_CLK_CTL 24 74*c66ec88fSEmmanuel Vadot #define SLAVE_CRYPTO_0_CFG 25 75*c66ec88fSEmmanuel Vadot #define SLAVE_DEHR_CFG 26 76*c66ec88fSEmmanuel Vadot #define SLAVE_DISPLAY_CFG 27 77*c66ec88fSEmmanuel Vadot #define SLAVE_GRAPHICS_3D_CFG 28 78*c66ec88fSEmmanuel Vadot #define SLAVE_IMEM_CFG 29 79*c66ec88fSEmmanuel Vadot #define SLAVE_LPASS 30 80*c66ec88fSEmmanuel Vadot #define SLAVE_MPM 31 81*c66ec88fSEmmanuel Vadot #define SLAVE_MSG_RAM 32 82*c66ec88fSEmmanuel Vadot #define SLAVE_MSS 33 83*c66ec88fSEmmanuel Vadot #define SLAVE_PDM 34 84*c66ec88fSEmmanuel Vadot #define SLAVE_PMIC_ARB 35 85*c66ec88fSEmmanuel Vadot #define SLAVE_PCNOC_CFG 36 86*c66ec88fSEmmanuel Vadot #define SLAVE_PRNG 37 87*c66ec88fSEmmanuel Vadot #define SLAVE_QDSS_CFG 38 88*c66ec88fSEmmanuel Vadot #define SLAVE_RBCPR_CFG 39 89*c66ec88fSEmmanuel Vadot #define SLAVE_SDCC_1 40 90*c66ec88fSEmmanuel Vadot #define SLAVE_SDCC_2 41 91*c66ec88fSEmmanuel Vadot #define SLAVE_SECURITY 42 92*c66ec88fSEmmanuel Vadot #define SLAVE_SNOC_CFG 43 93*c66ec88fSEmmanuel Vadot #define SLAVE_SPDM 44 94*c66ec88fSEmmanuel Vadot #define SLAVE_TCSR 45 95*c66ec88fSEmmanuel Vadot #define SLAVE_TLMM 46 96*c66ec88fSEmmanuel Vadot #define SLAVE_USB_HS 47 97*c66ec88fSEmmanuel Vadot #define SLAVE_VENUS_CFG 48 98*c66ec88fSEmmanuel Vadot #define SNOC_PCNOC_SLV 49 99*c66ec88fSEmmanuel Vadot 100*c66ec88fSEmmanuel Vadot #endif 101