1*d5b0e70fSEmmanuel Vadot /* SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) */ 2*d5b0e70fSEmmanuel Vadot /* 3*d5b0e70fSEmmanuel Vadot * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved. 4*d5b0e70fSEmmanuel Vadot */ 5*d5b0e70fSEmmanuel Vadot 6*d5b0e70fSEmmanuel Vadot #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_SDX65_H 7*d5b0e70fSEmmanuel Vadot #define __DT_BINDINGS_INTERCONNECT_QCOM_SDX65_H 8*d5b0e70fSEmmanuel Vadot 9*d5b0e70fSEmmanuel Vadot #define MASTER_LLCC 0 10*d5b0e70fSEmmanuel Vadot #define SLAVE_EBI1 1 11*d5b0e70fSEmmanuel Vadot 12*d5b0e70fSEmmanuel Vadot #define MASTER_TCU_0 0 13*d5b0e70fSEmmanuel Vadot #define MASTER_SNOC_GC_MEM_NOC 1 14*d5b0e70fSEmmanuel Vadot #define MASTER_APPSS_PROC 2 15*d5b0e70fSEmmanuel Vadot #define SLAVE_LLCC 3 16*d5b0e70fSEmmanuel Vadot #define SLAVE_MEM_NOC_SNOC 4 17*d5b0e70fSEmmanuel Vadot #define SLAVE_MEM_NOC_PCIE_SNOC 5 18*d5b0e70fSEmmanuel Vadot 19*d5b0e70fSEmmanuel Vadot #define MASTER_AUDIO 0 20*d5b0e70fSEmmanuel Vadot #define MASTER_BLSP_1 1 21*d5b0e70fSEmmanuel Vadot #define MASTER_QDSS_BAM 2 22*d5b0e70fSEmmanuel Vadot #define MASTER_QPIC 3 23*d5b0e70fSEmmanuel Vadot #define MASTER_SNOC_CFG 4 24*d5b0e70fSEmmanuel Vadot #define MASTER_SPMI_FETCHER 5 25*d5b0e70fSEmmanuel Vadot #define MASTER_ANOC_SNOC 6 26*d5b0e70fSEmmanuel Vadot #define MASTER_IPA 7 27*d5b0e70fSEmmanuel Vadot #define MASTER_MEM_NOC_SNOC 8 28*d5b0e70fSEmmanuel Vadot #define MASTER_MEM_NOC_PCIE_SNOC 9 29*d5b0e70fSEmmanuel Vadot #define MASTER_CRYPTO 10 30*d5b0e70fSEmmanuel Vadot #define MASTER_IPA_PCIE 11 31*d5b0e70fSEmmanuel Vadot #define MASTER_PCIE_0 12 32*d5b0e70fSEmmanuel Vadot #define MASTER_QDSS_ETR 13 33*d5b0e70fSEmmanuel Vadot #define MASTER_SDCC_1 14 34*d5b0e70fSEmmanuel Vadot #define MASTER_USB3 15 35*d5b0e70fSEmmanuel Vadot #define SLAVE_AOSS 16 36*d5b0e70fSEmmanuel Vadot #define SLAVE_APPSS 17 37*d5b0e70fSEmmanuel Vadot #define SLAVE_AUDIO 18 38*d5b0e70fSEmmanuel Vadot #define SLAVE_BLSP_1 19 39*d5b0e70fSEmmanuel Vadot #define SLAVE_CLK_CTL 20 40*d5b0e70fSEmmanuel Vadot #define SLAVE_CRYPTO_0_CFG 21 41*d5b0e70fSEmmanuel Vadot #define SLAVE_CNOC_DDRSS 22 42*d5b0e70fSEmmanuel Vadot #define SLAVE_ECC_CFG 23 43*d5b0e70fSEmmanuel Vadot #define SLAVE_IMEM_CFG 24 44*d5b0e70fSEmmanuel Vadot #define SLAVE_IPA_CFG 25 45*d5b0e70fSEmmanuel Vadot #define SLAVE_CNOC_MSS 26 46*d5b0e70fSEmmanuel Vadot #define SLAVE_PCIE_PARF 27 47*d5b0e70fSEmmanuel Vadot #define SLAVE_PDM 28 48*d5b0e70fSEmmanuel Vadot #define SLAVE_PRNG 29 49*d5b0e70fSEmmanuel Vadot #define SLAVE_QDSS_CFG 30 50*d5b0e70fSEmmanuel Vadot #define SLAVE_QPIC 31 51*d5b0e70fSEmmanuel Vadot #define SLAVE_SDCC_1 32 52*d5b0e70fSEmmanuel Vadot #define SLAVE_SNOC_CFG 33 53*d5b0e70fSEmmanuel Vadot #define SLAVE_SPMI_FETCHER 34 54*d5b0e70fSEmmanuel Vadot #define SLAVE_SPMI_VGI_COEX 35 55*d5b0e70fSEmmanuel Vadot #define SLAVE_TCSR 36 56*d5b0e70fSEmmanuel Vadot #define SLAVE_TLMM 37 57*d5b0e70fSEmmanuel Vadot #define SLAVE_USB3 38 58*d5b0e70fSEmmanuel Vadot #define SLAVE_USB3_PHY_CFG 39 59*d5b0e70fSEmmanuel Vadot #define SLAVE_ANOC_SNOC 40 60*d5b0e70fSEmmanuel Vadot #define SLAVE_SNOC_MEM_NOC_GC 41 61*d5b0e70fSEmmanuel Vadot #define SLAVE_IMEM 42 62*d5b0e70fSEmmanuel Vadot #define SLAVE_SERVICE_SNOC 43 63*d5b0e70fSEmmanuel Vadot #define SLAVE_PCIE_0 44 64*d5b0e70fSEmmanuel Vadot #define SLAVE_QDSS_STM 45 65*d5b0e70fSEmmanuel Vadot #define SLAVE_TCU 46 66*d5b0e70fSEmmanuel Vadot 67*d5b0e70fSEmmanuel Vadot #endif 68