1*5def4c47SEmmanuel Vadot /* SPDX-License-Identifier: GPL-2.0 */ 2*5def4c47SEmmanuel Vadot /* 3*5def4c47SEmmanuel Vadot * Qualcomm SDX55 interconnect IDs 4*5def4c47SEmmanuel Vadot * 5*5def4c47SEmmanuel Vadot * Copyright (c) 2021, Linaro Ltd. 6*5def4c47SEmmanuel Vadot * Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> 7*5def4c47SEmmanuel Vadot */ 8*5def4c47SEmmanuel Vadot 9*5def4c47SEmmanuel Vadot #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_SDX55_H 10*5def4c47SEmmanuel Vadot #define __DT_BINDINGS_INTERCONNECT_QCOM_SDX55_H 11*5def4c47SEmmanuel Vadot 12*5def4c47SEmmanuel Vadot #define MASTER_LLCC 0 13*5def4c47SEmmanuel Vadot #define SLAVE_EBI_CH0 1 14*5def4c47SEmmanuel Vadot 15*5def4c47SEmmanuel Vadot #define MASTER_TCU_0 0 16*5def4c47SEmmanuel Vadot #define MASTER_SNOC_GC_MEM_NOC 1 17*5def4c47SEmmanuel Vadot #define MASTER_AMPSS_M0 2 18*5def4c47SEmmanuel Vadot #define SLAVE_LLCC 3 19*5def4c47SEmmanuel Vadot #define SLAVE_MEM_NOC_SNOC 4 20*5def4c47SEmmanuel Vadot #define SLAVE_MEM_NOC_PCIE_SNOC 5 21*5def4c47SEmmanuel Vadot 22*5def4c47SEmmanuel Vadot #define MASTER_AUDIO 0 23*5def4c47SEmmanuel Vadot #define MASTER_BLSP_1 1 24*5def4c47SEmmanuel Vadot #define MASTER_QDSS_BAM 2 25*5def4c47SEmmanuel Vadot #define MASTER_QPIC 3 26*5def4c47SEmmanuel Vadot #define MASTER_SNOC_CFG 4 27*5def4c47SEmmanuel Vadot #define MASTER_SPMI_FETCHER 5 28*5def4c47SEmmanuel Vadot #define MASTER_ANOC_SNOC 6 29*5def4c47SEmmanuel Vadot #define MASTER_IPA 7 30*5def4c47SEmmanuel Vadot #define MASTER_MEM_NOC_SNOC 8 31*5def4c47SEmmanuel Vadot #define MASTER_MEM_NOC_PCIE_SNOC 9 32*5def4c47SEmmanuel Vadot #define MASTER_CRYPTO_CORE_0 10 33*5def4c47SEmmanuel Vadot #define MASTER_EMAC 11 34*5def4c47SEmmanuel Vadot #define MASTER_IPA_PCIE 12 35*5def4c47SEmmanuel Vadot #define MASTER_PCIE 13 36*5def4c47SEmmanuel Vadot #define MASTER_QDSS_ETR 14 37*5def4c47SEmmanuel Vadot #define MASTER_SDCC_1 15 38*5def4c47SEmmanuel Vadot #define MASTER_USB3 16 39*5def4c47SEmmanuel Vadot #define SLAVE_AOP 17 40*5def4c47SEmmanuel Vadot #define SLAVE_AOSS 18 41*5def4c47SEmmanuel Vadot #define SLAVE_APPSS 19 42*5def4c47SEmmanuel Vadot #define SLAVE_AUDIO 20 43*5def4c47SEmmanuel Vadot #define SLAVE_BLSP_1 21 44*5def4c47SEmmanuel Vadot #define SLAVE_CLK_CTL 22 45*5def4c47SEmmanuel Vadot #define SLAVE_CRYPTO_0_CFG 23 46*5def4c47SEmmanuel Vadot #define SLAVE_CNOC_DDRSS 24 47*5def4c47SEmmanuel Vadot #define SLAVE_ECC_CFG 25 48*5def4c47SEmmanuel Vadot #define SLAVE_EMAC_CFG 26 49*5def4c47SEmmanuel Vadot #define SLAVE_IMEM_CFG 27 50*5def4c47SEmmanuel Vadot #define SLAVE_IPA_CFG 28 51*5def4c47SEmmanuel Vadot #define SLAVE_CNOC_MSS 29 52*5def4c47SEmmanuel Vadot #define SLAVE_PCIE_PARF 30 53*5def4c47SEmmanuel Vadot #define SLAVE_PDM 31 54*5def4c47SEmmanuel Vadot #define SLAVE_PRNG 32 55*5def4c47SEmmanuel Vadot #define SLAVE_QDSS_CFG 33 56*5def4c47SEmmanuel Vadot #define SLAVE_QPIC 34 57*5def4c47SEmmanuel Vadot #define SLAVE_SDCC_1 35 58*5def4c47SEmmanuel Vadot #define SLAVE_SNOC_CFG 36 59*5def4c47SEmmanuel Vadot #define SLAVE_SPMI_FETCHER 37 60*5def4c47SEmmanuel Vadot #define SLAVE_SPMI_VGI_COEX 38 61*5def4c47SEmmanuel Vadot #define SLAVE_TCSR 39 62*5def4c47SEmmanuel Vadot #define SLAVE_TLMM 40 63*5def4c47SEmmanuel Vadot #define SLAVE_USB3 41 64*5def4c47SEmmanuel Vadot #define SLAVE_USB3_PHY_CFG 42 65*5def4c47SEmmanuel Vadot #define SLAVE_ANOC_SNOC 43 66*5def4c47SEmmanuel Vadot #define SLAVE_SNOC_MEM_NOC_GC 44 67*5def4c47SEmmanuel Vadot #define SLAVE_OCIMEM 45 68*5def4c47SEmmanuel Vadot #define SLAVE_SERVICE_SNOC 46 69*5def4c47SEmmanuel Vadot #define SLAVE_PCIE_0 47 70*5def4c47SEmmanuel Vadot #define SLAVE_QDSS_STM 48 71*5def4c47SEmmanuel Vadot #define SLAVE_TCU 49 72*5def4c47SEmmanuel Vadot 73*5def4c47SEmmanuel Vadot 74*5def4c47SEmmanuel Vadot #endif 75