1*d5b0e70fSEmmanuel Vadot /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 2*d5b0e70fSEmmanuel Vadot /* 3*d5b0e70fSEmmanuel Vadot * Copyright (c) 2021, The Linux Foundation. All rights reserved. 4*d5b0e70fSEmmanuel Vadot * Copyright (c) 2022, Linaro Ltd. 5*d5b0e70fSEmmanuel Vadot */ 6*d5b0e70fSEmmanuel Vadot 7*d5b0e70fSEmmanuel Vadot #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_SC8280XP_H 8*d5b0e70fSEmmanuel Vadot #define __DT_BINDINGS_INTERCONNECT_QCOM_SC8280XP_H 9*d5b0e70fSEmmanuel Vadot 10*d5b0e70fSEmmanuel Vadot /* aggre1_noc */ 11*d5b0e70fSEmmanuel Vadot #define MASTER_QSPI_0 0 12*d5b0e70fSEmmanuel Vadot #define MASTER_QUP_1 1 13*d5b0e70fSEmmanuel Vadot #define MASTER_QUP_2 2 14*d5b0e70fSEmmanuel Vadot #define MASTER_A1NOC_CFG 3 15*d5b0e70fSEmmanuel Vadot #define MASTER_IPA 4 16*d5b0e70fSEmmanuel Vadot #define MASTER_EMAC_1 5 17*d5b0e70fSEmmanuel Vadot #define MASTER_SDCC_4 6 18*d5b0e70fSEmmanuel Vadot #define MASTER_UFS_MEM 7 19*d5b0e70fSEmmanuel Vadot #define MASTER_USB3_0 8 20*d5b0e70fSEmmanuel Vadot #define MASTER_USB3_1 9 21*d5b0e70fSEmmanuel Vadot #define MASTER_USB3_MP 10 22*d5b0e70fSEmmanuel Vadot #define MASTER_USB4_0 11 23*d5b0e70fSEmmanuel Vadot #define MASTER_USB4_1 12 24*d5b0e70fSEmmanuel Vadot #define SLAVE_A1NOC_SNOC 13 25*d5b0e70fSEmmanuel Vadot #define SLAVE_USB_NOC_SNOC 14 26*d5b0e70fSEmmanuel Vadot #define SLAVE_SERVICE_A1NOC 15 27*d5b0e70fSEmmanuel Vadot 28*d5b0e70fSEmmanuel Vadot /* aggre2_noc */ 29*d5b0e70fSEmmanuel Vadot #define MASTER_QDSS_BAM 0 30*d5b0e70fSEmmanuel Vadot #define MASTER_QUP_0 1 31*d5b0e70fSEmmanuel Vadot #define MASTER_A2NOC_CFG 2 32*d5b0e70fSEmmanuel Vadot #define MASTER_CRYPTO 3 33*d5b0e70fSEmmanuel Vadot #define MASTER_SENSORS_PROC 4 34*d5b0e70fSEmmanuel Vadot #define MASTER_SP 5 35*d5b0e70fSEmmanuel Vadot #define MASTER_EMAC 6 36*d5b0e70fSEmmanuel Vadot #define MASTER_PCIE_0 7 37*d5b0e70fSEmmanuel Vadot #define MASTER_PCIE_1 8 38*d5b0e70fSEmmanuel Vadot #define MASTER_PCIE_2A 9 39*d5b0e70fSEmmanuel Vadot #define MASTER_PCIE_2B 10 40*d5b0e70fSEmmanuel Vadot #define MASTER_PCIE_3A 11 41*d5b0e70fSEmmanuel Vadot #define MASTER_PCIE_3B 12 42*d5b0e70fSEmmanuel Vadot #define MASTER_PCIE_4 13 43*d5b0e70fSEmmanuel Vadot #define MASTER_QDSS_ETR 14 44*d5b0e70fSEmmanuel Vadot #define MASTER_SDCC_2 15 45*d5b0e70fSEmmanuel Vadot #define MASTER_UFS_CARD 16 46*d5b0e70fSEmmanuel Vadot #define SLAVE_A2NOC_SNOC 17 47*d5b0e70fSEmmanuel Vadot #define SLAVE_ANOC_PCIE_GEM_NOC 18 48*d5b0e70fSEmmanuel Vadot #define SLAVE_SERVICE_A2NOC 19 49*d5b0e70fSEmmanuel Vadot 50*d5b0e70fSEmmanuel Vadot /* clk_virt */ 51*d5b0e70fSEmmanuel Vadot #define MASTER_IPA_CORE 0 52*d5b0e70fSEmmanuel Vadot #define MASTER_QUP_CORE_0 1 53*d5b0e70fSEmmanuel Vadot #define MASTER_QUP_CORE_1 2 54*d5b0e70fSEmmanuel Vadot #define MASTER_QUP_CORE_2 3 55*d5b0e70fSEmmanuel Vadot #define SLAVE_IPA_CORE 4 56*d5b0e70fSEmmanuel Vadot #define SLAVE_QUP_CORE_0 5 57*d5b0e70fSEmmanuel Vadot #define SLAVE_QUP_CORE_1 6 58*d5b0e70fSEmmanuel Vadot #define SLAVE_QUP_CORE_2 7 59*d5b0e70fSEmmanuel Vadot 60*d5b0e70fSEmmanuel Vadot /* config_noc */ 61*d5b0e70fSEmmanuel Vadot #define MASTER_GEM_NOC_CNOC 0 62*d5b0e70fSEmmanuel Vadot #define MASTER_GEM_NOC_PCIE_SNOC 1 63*d5b0e70fSEmmanuel Vadot #define SLAVE_AHB2PHY_0 2 64*d5b0e70fSEmmanuel Vadot #define SLAVE_AHB2PHY_1 3 65*d5b0e70fSEmmanuel Vadot #define SLAVE_AHB2PHY_2 4 66*d5b0e70fSEmmanuel Vadot #define SLAVE_AOSS 5 67*d5b0e70fSEmmanuel Vadot #define SLAVE_APPSS 6 68*d5b0e70fSEmmanuel Vadot #define SLAVE_CAMERA_CFG 7 69*d5b0e70fSEmmanuel Vadot #define SLAVE_CLK_CTL 8 70*d5b0e70fSEmmanuel Vadot #define SLAVE_CDSP_CFG 9 71*d5b0e70fSEmmanuel Vadot #define SLAVE_CDSP1_CFG 10 72*d5b0e70fSEmmanuel Vadot #define SLAVE_RBCPR_CX_CFG 11 73*d5b0e70fSEmmanuel Vadot #define SLAVE_RBCPR_MMCX_CFG 12 74*d5b0e70fSEmmanuel Vadot #define SLAVE_RBCPR_MX_CFG 13 75*d5b0e70fSEmmanuel Vadot #define SLAVE_CPR_NSPCX 14 76*d5b0e70fSEmmanuel Vadot #define SLAVE_CRYPTO_0_CFG 15 77*d5b0e70fSEmmanuel Vadot #define SLAVE_CX_RDPM 16 78*d5b0e70fSEmmanuel Vadot #define SLAVE_DCC_CFG 17 79*d5b0e70fSEmmanuel Vadot #define SLAVE_DISPLAY_CFG 18 80*d5b0e70fSEmmanuel Vadot #define SLAVE_DISPLAY1_CFG 19 81*d5b0e70fSEmmanuel Vadot #define SLAVE_EMAC_CFG 20 82*d5b0e70fSEmmanuel Vadot #define SLAVE_EMAC1_CFG 21 83*d5b0e70fSEmmanuel Vadot #define SLAVE_GFX3D_CFG 22 84*d5b0e70fSEmmanuel Vadot #define SLAVE_HWKM 23 85*d5b0e70fSEmmanuel Vadot #define SLAVE_IMEM_CFG 24 86*d5b0e70fSEmmanuel Vadot #define SLAVE_IPA_CFG 25 87*d5b0e70fSEmmanuel Vadot #define SLAVE_IPC_ROUTER_CFG 26 88*d5b0e70fSEmmanuel Vadot #define SLAVE_LPASS 27 89*d5b0e70fSEmmanuel Vadot #define SLAVE_MX_RDPM 28 90*d5b0e70fSEmmanuel Vadot #define SLAVE_MXC_RDPM 29 91*d5b0e70fSEmmanuel Vadot #define SLAVE_PCIE_0_CFG 30 92*d5b0e70fSEmmanuel Vadot #define SLAVE_PCIE_1_CFG 31 93*d5b0e70fSEmmanuel Vadot #define SLAVE_PCIE_2A_CFG 32 94*d5b0e70fSEmmanuel Vadot #define SLAVE_PCIE_2B_CFG 33 95*d5b0e70fSEmmanuel Vadot #define SLAVE_PCIE_3A_CFG 34 96*d5b0e70fSEmmanuel Vadot #define SLAVE_PCIE_3B_CFG 35 97*d5b0e70fSEmmanuel Vadot #define SLAVE_PCIE_4_CFG 36 98*d5b0e70fSEmmanuel Vadot #define SLAVE_PCIE_RSC_CFG 37 99*d5b0e70fSEmmanuel Vadot #define SLAVE_PDM 38 100*d5b0e70fSEmmanuel Vadot #define SLAVE_PIMEM_CFG 39 101*d5b0e70fSEmmanuel Vadot #define SLAVE_PKA_WRAPPER_CFG 40 102*d5b0e70fSEmmanuel Vadot #define SLAVE_PMU_WRAPPER_CFG 41 103*d5b0e70fSEmmanuel Vadot #define SLAVE_QDSS_CFG 42 104*d5b0e70fSEmmanuel Vadot #define SLAVE_QSPI_0 43 105*d5b0e70fSEmmanuel Vadot #define SLAVE_QUP_0 44 106*d5b0e70fSEmmanuel Vadot #define SLAVE_QUP_1 45 107*d5b0e70fSEmmanuel Vadot #define SLAVE_QUP_2 46 108*d5b0e70fSEmmanuel Vadot #define SLAVE_SDCC_2 47 109*d5b0e70fSEmmanuel Vadot #define SLAVE_SDCC_4 48 110*d5b0e70fSEmmanuel Vadot #define SLAVE_SECURITY 49 111*d5b0e70fSEmmanuel Vadot #define SLAVE_SMMUV3_CFG 50 112*d5b0e70fSEmmanuel Vadot #define SLAVE_SMSS_CFG 51 113*d5b0e70fSEmmanuel Vadot #define SLAVE_SPSS_CFG 52 114*d5b0e70fSEmmanuel Vadot #define SLAVE_TCSR 53 115*d5b0e70fSEmmanuel Vadot #define SLAVE_TLMM 54 116*d5b0e70fSEmmanuel Vadot #define SLAVE_UFS_CARD_CFG 55 117*d5b0e70fSEmmanuel Vadot #define SLAVE_UFS_MEM_CFG 56 118*d5b0e70fSEmmanuel Vadot #define SLAVE_USB3_0 57 119*d5b0e70fSEmmanuel Vadot #define SLAVE_USB3_1 58 120*d5b0e70fSEmmanuel Vadot #define SLAVE_USB3_MP 59 121*d5b0e70fSEmmanuel Vadot #define SLAVE_USB4_0 60 122*d5b0e70fSEmmanuel Vadot #define SLAVE_USB4_1 61 123*d5b0e70fSEmmanuel Vadot #define SLAVE_VENUS_CFG 62 124*d5b0e70fSEmmanuel Vadot #define SLAVE_VSENSE_CTRL_CFG 63 125*d5b0e70fSEmmanuel Vadot #define SLAVE_VSENSE_CTRL_R_CFG 64 126*d5b0e70fSEmmanuel Vadot #define SLAVE_A1NOC_CFG 65 127*d5b0e70fSEmmanuel Vadot #define SLAVE_A2NOC_CFG 66 128*d5b0e70fSEmmanuel Vadot #define SLAVE_ANOC_PCIE_BRIDGE_CFG 67 129*d5b0e70fSEmmanuel Vadot #define SLAVE_DDRSS_CFG 68 130*d5b0e70fSEmmanuel Vadot #define SLAVE_CNOC_MNOC_CFG 69 131*d5b0e70fSEmmanuel Vadot #define SLAVE_SNOC_CFG 70 132*d5b0e70fSEmmanuel Vadot #define SLAVE_SNOC_SF_BRIDGE_CFG 71 133*d5b0e70fSEmmanuel Vadot #define SLAVE_IMEM 72 134*d5b0e70fSEmmanuel Vadot #define SLAVE_PIMEM 73 135*d5b0e70fSEmmanuel Vadot #define SLAVE_SERVICE_CNOC 74 136*d5b0e70fSEmmanuel Vadot #define SLAVE_PCIE_0 75 137*d5b0e70fSEmmanuel Vadot #define SLAVE_PCIE_1 76 138*d5b0e70fSEmmanuel Vadot #define SLAVE_PCIE_2A 77 139*d5b0e70fSEmmanuel Vadot #define SLAVE_PCIE_2B 78 140*d5b0e70fSEmmanuel Vadot #define SLAVE_PCIE_3A 79 141*d5b0e70fSEmmanuel Vadot #define SLAVE_PCIE_3B 80 142*d5b0e70fSEmmanuel Vadot #define SLAVE_PCIE_4 81 143*d5b0e70fSEmmanuel Vadot #define SLAVE_QDSS_STM 82 144*d5b0e70fSEmmanuel Vadot #define SLAVE_SMSS 83 145*d5b0e70fSEmmanuel Vadot #define SLAVE_TCU 84 146*d5b0e70fSEmmanuel Vadot 147*d5b0e70fSEmmanuel Vadot /* dc_noc */ 148*d5b0e70fSEmmanuel Vadot #define MASTER_CNOC_DC_NOC 0 149*d5b0e70fSEmmanuel Vadot #define SLAVE_LLCC_CFG 1 150*d5b0e70fSEmmanuel Vadot #define SLAVE_GEM_NOC_CFG 2 151*d5b0e70fSEmmanuel Vadot 152*d5b0e70fSEmmanuel Vadot /* gem_noc */ 153*d5b0e70fSEmmanuel Vadot #define MASTER_GPU_TCU 0 154*d5b0e70fSEmmanuel Vadot #define MASTER_PCIE_TCU 1 155*d5b0e70fSEmmanuel Vadot #define MASTER_SYS_TCU 2 156*d5b0e70fSEmmanuel Vadot #define MASTER_APPSS_PROC 3 157*d5b0e70fSEmmanuel Vadot #define MASTER_COMPUTE_NOC 4 158*d5b0e70fSEmmanuel Vadot #define MASTER_COMPUTE_NOC_1 5 159*d5b0e70fSEmmanuel Vadot #define MASTER_GEM_NOC_CFG 6 160*d5b0e70fSEmmanuel Vadot #define MASTER_GFX3D 7 161*d5b0e70fSEmmanuel Vadot #define MASTER_MNOC_HF_MEM_NOC 8 162*d5b0e70fSEmmanuel Vadot #define MASTER_MNOC_SF_MEM_NOC 9 163*d5b0e70fSEmmanuel Vadot #define MASTER_ANOC_PCIE_GEM_NOC 10 164*d5b0e70fSEmmanuel Vadot #define MASTER_SNOC_GC_MEM_NOC 11 165*d5b0e70fSEmmanuel Vadot #define MASTER_SNOC_SF_MEM_NOC 12 166*d5b0e70fSEmmanuel Vadot #define SLAVE_GEM_NOC_CNOC 13 167*d5b0e70fSEmmanuel Vadot #define SLAVE_LLCC 14 168*d5b0e70fSEmmanuel Vadot #define SLAVE_GEM_NOC_PCIE_CNOC 15 169*d5b0e70fSEmmanuel Vadot #define SLAVE_SERVICE_GEM_NOC_1 16 170*d5b0e70fSEmmanuel Vadot #define SLAVE_SERVICE_GEM_NOC_2 17 171*d5b0e70fSEmmanuel Vadot #define SLAVE_SERVICE_GEM_NOC 18 172*d5b0e70fSEmmanuel Vadot 173*d5b0e70fSEmmanuel Vadot /* lpass_ag_noc */ 174*d5b0e70fSEmmanuel Vadot #define MASTER_CNOC_LPASS_AG_NOC 0 175*d5b0e70fSEmmanuel Vadot #define MASTER_LPASS_PROC 1 176*d5b0e70fSEmmanuel Vadot #define SLAVE_LPASS_CORE_CFG 2 177*d5b0e70fSEmmanuel Vadot #define SLAVE_LPASS_LPI_CFG 3 178*d5b0e70fSEmmanuel Vadot #define SLAVE_LPASS_MPU_CFG 4 179*d5b0e70fSEmmanuel Vadot #define SLAVE_LPASS_TOP_CFG 5 180*d5b0e70fSEmmanuel Vadot #define SLAVE_LPASS_SNOC 6 181*d5b0e70fSEmmanuel Vadot #define SLAVE_SERVICES_LPASS_AML_NOC 7 182*d5b0e70fSEmmanuel Vadot #define SLAVE_SERVICE_LPASS_AG_NOC 8 183*d5b0e70fSEmmanuel Vadot 184*d5b0e70fSEmmanuel Vadot /* mc_virt */ 185*d5b0e70fSEmmanuel Vadot #define MASTER_LLCC 0 186*d5b0e70fSEmmanuel Vadot #define SLAVE_EBI1 1 187*d5b0e70fSEmmanuel Vadot 188*d5b0e70fSEmmanuel Vadot /*mmss_noc */ 189*d5b0e70fSEmmanuel Vadot #define MASTER_CAMNOC_HF 0 190*d5b0e70fSEmmanuel Vadot #define MASTER_MDP0 1 191*d5b0e70fSEmmanuel Vadot #define MASTER_MDP1 2 192*d5b0e70fSEmmanuel Vadot #define MASTER_MDP_CORE1_0 3 193*d5b0e70fSEmmanuel Vadot #define MASTER_MDP_CORE1_1 4 194*d5b0e70fSEmmanuel Vadot #define MASTER_CNOC_MNOC_CFG 5 195*d5b0e70fSEmmanuel Vadot #define MASTER_ROTATOR 6 196*d5b0e70fSEmmanuel Vadot #define MASTER_ROTATOR_1 7 197*d5b0e70fSEmmanuel Vadot #define MASTER_VIDEO_P0 8 198*d5b0e70fSEmmanuel Vadot #define MASTER_VIDEO_P1 9 199*d5b0e70fSEmmanuel Vadot #define MASTER_VIDEO_PROC 10 200*d5b0e70fSEmmanuel Vadot #define MASTER_CAMNOC_ICP 11 201*d5b0e70fSEmmanuel Vadot #define MASTER_CAMNOC_SF 12 202*d5b0e70fSEmmanuel Vadot #define SLAVE_MNOC_HF_MEM_NOC 13 203*d5b0e70fSEmmanuel Vadot #define SLAVE_MNOC_SF_MEM_NOC 14 204*d5b0e70fSEmmanuel Vadot #define SLAVE_SERVICE_MNOC 15 205*d5b0e70fSEmmanuel Vadot 206*d5b0e70fSEmmanuel Vadot /* nspa_noc */ 207*d5b0e70fSEmmanuel Vadot #define MASTER_CDSP_NOC_CFG 0 208*d5b0e70fSEmmanuel Vadot #define MASTER_CDSP_PROC 1 209*d5b0e70fSEmmanuel Vadot #define SLAVE_CDSP_MEM_NOC 2 210*d5b0e70fSEmmanuel Vadot #define SLAVE_NSP_XFR 3 211*d5b0e70fSEmmanuel Vadot #define SLAVE_SERVICE_NSP_NOC 4 212*d5b0e70fSEmmanuel Vadot 213*d5b0e70fSEmmanuel Vadot /* nspb_noc */ 214*d5b0e70fSEmmanuel Vadot #define MASTER_CDSPB_NOC_CFG 0 215*d5b0e70fSEmmanuel Vadot #define MASTER_CDSP_PROC_B 1 216*d5b0e70fSEmmanuel Vadot #define SLAVE_CDSPB_MEM_NOC 2 217*d5b0e70fSEmmanuel Vadot #define SLAVE_NSPB_XFR 3 218*d5b0e70fSEmmanuel Vadot #define SLAVE_SERVICE_NSPB_NOC 4 219*d5b0e70fSEmmanuel Vadot 220*d5b0e70fSEmmanuel Vadot /* system_noc */ 221*d5b0e70fSEmmanuel Vadot #define MASTER_A1NOC_SNOC 0 222*d5b0e70fSEmmanuel Vadot #define MASTER_A2NOC_SNOC 1 223*d5b0e70fSEmmanuel Vadot #define MASTER_USB_NOC_SNOC 2 224*d5b0e70fSEmmanuel Vadot #define MASTER_LPASS_ANOC 3 225*d5b0e70fSEmmanuel Vadot #define MASTER_SNOC_CFG 4 226*d5b0e70fSEmmanuel Vadot #define MASTER_PIMEM 5 227*d5b0e70fSEmmanuel Vadot #define MASTER_GIC 6 228*d5b0e70fSEmmanuel Vadot #define SLAVE_SNOC_GEM_NOC_GC 7 229*d5b0e70fSEmmanuel Vadot #define SLAVE_SNOC_GEM_NOC_SF 8 230*d5b0e70fSEmmanuel Vadot #define SLAVE_SERVICE_SNOC 9 231*d5b0e70fSEmmanuel Vadot 232*d5b0e70fSEmmanuel Vadot #endif 233