xref: /freebsd-src/sys/contrib/device-tree/include/dt-bindings/interconnect/qcom,sc7280.h (revision 5956d97f4b3204318ceb6aa9c77bd0bc6ea87a41)
1*5956d97fSEmmanuel Vadot /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
2*5956d97fSEmmanuel Vadot /*
3*5956d97fSEmmanuel Vadot  * Qualcomm SC7280 interconnect IDs
4*5956d97fSEmmanuel Vadot  *
5*5956d97fSEmmanuel Vadot  * Copyright (c) 2021, The Linux Foundation. All rights reserved.
6*5956d97fSEmmanuel Vadot  */
7*5956d97fSEmmanuel Vadot 
8*5956d97fSEmmanuel Vadot #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_SC7280_H
9*5956d97fSEmmanuel Vadot #define __DT_BINDINGS_INTERCONNECT_QCOM_SC7280_H
10*5956d97fSEmmanuel Vadot 
11*5956d97fSEmmanuel Vadot #define MASTER_QSPI_0			0
12*5956d97fSEmmanuel Vadot #define MASTER_QUP_0			1
13*5956d97fSEmmanuel Vadot #define MASTER_QUP_1			2
14*5956d97fSEmmanuel Vadot #define MASTER_A1NOC_CFG			3
15*5956d97fSEmmanuel Vadot #define MASTER_PCIE_0			4
16*5956d97fSEmmanuel Vadot #define MASTER_PCIE_1			5
17*5956d97fSEmmanuel Vadot #define MASTER_SDCC_1			6
18*5956d97fSEmmanuel Vadot #define MASTER_SDCC_2			7
19*5956d97fSEmmanuel Vadot #define MASTER_SDCC_4			8
20*5956d97fSEmmanuel Vadot #define MASTER_UFS_MEM			9
21*5956d97fSEmmanuel Vadot #define MASTER_USB2			10
22*5956d97fSEmmanuel Vadot #define MASTER_USB3_0			11
23*5956d97fSEmmanuel Vadot #define SLAVE_A1NOC_SNOC			12
24*5956d97fSEmmanuel Vadot #define SLAVE_ANOC_PCIE_GEM_NOC			13
25*5956d97fSEmmanuel Vadot #define SLAVE_SERVICE_A1NOC			14
26*5956d97fSEmmanuel Vadot 
27*5956d97fSEmmanuel Vadot #define MASTER_QDSS_BAM			0
28*5956d97fSEmmanuel Vadot #define MASTER_A2NOC_CFG			1
29*5956d97fSEmmanuel Vadot #define MASTER_CNOC_A2NOC			2
30*5956d97fSEmmanuel Vadot #define MASTER_CRYPTO			3
31*5956d97fSEmmanuel Vadot #define MASTER_IPA			4
32*5956d97fSEmmanuel Vadot #define MASTER_QDSS_ETR			5
33*5956d97fSEmmanuel Vadot #define SLAVE_A2NOC_SNOC			6
34*5956d97fSEmmanuel Vadot #define SLAVE_SERVICE_A2NOC			7
35*5956d97fSEmmanuel Vadot 
36*5956d97fSEmmanuel Vadot #define MASTER_QUP_CORE_0			0
37*5956d97fSEmmanuel Vadot #define MASTER_QUP_CORE_1		1
38*5956d97fSEmmanuel Vadot #define SLAVE_QUP_CORE_0			2
39*5956d97fSEmmanuel Vadot #define SLAVE_QUP_CORE_1			3
40*5956d97fSEmmanuel Vadot 
41*5956d97fSEmmanuel Vadot #define MASTER_CNOC3_CNOC2			0
42*5956d97fSEmmanuel Vadot #define MASTER_QDSS_DAP			1
43*5956d97fSEmmanuel Vadot #define SLAVE_AHB2PHY_SOUTH			2
44*5956d97fSEmmanuel Vadot #define SLAVE_AHB2PHY_NORTH			3
45*5956d97fSEmmanuel Vadot #define SLAVE_CAMERA_CFG			4
46*5956d97fSEmmanuel Vadot #define SLAVE_CLK_CTL			5
47*5956d97fSEmmanuel Vadot #define SLAVE_CDSP_CFG			6
48*5956d97fSEmmanuel Vadot #define SLAVE_RBCPR_CX_CFG			7
49*5956d97fSEmmanuel Vadot #define SLAVE_RBCPR_MX_CFG			8
50*5956d97fSEmmanuel Vadot #define SLAVE_CRYPTO_0_CFG			9
51*5956d97fSEmmanuel Vadot #define SLAVE_CX_RDPM			10
52*5956d97fSEmmanuel Vadot #define SLAVE_DCC_CFG			11
53*5956d97fSEmmanuel Vadot #define SLAVE_DISPLAY_CFG			12
54*5956d97fSEmmanuel Vadot #define SLAVE_GFX3D_CFG			13
55*5956d97fSEmmanuel Vadot #define SLAVE_HWKM			14
56*5956d97fSEmmanuel Vadot #define SLAVE_IMEM_CFG			15
57*5956d97fSEmmanuel Vadot #define SLAVE_IPA_CFG			16
58*5956d97fSEmmanuel Vadot #define SLAVE_IPC_ROUTER_CFG			17
59*5956d97fSEmmanuel Vadot #define SLAVE_LPASS			18
60*5956d97fSEmmanuel Vadot #define SLAVE_CNOC_MSS			19
61*5956d97fSEmmanuel Vadot #define SLAVE_MX_RDPM			20
62*5956d97fSEmmanuel Vadot #define SLAVE_PCIE_0_CFG			21
63*5956d97fSEmmanuel Vadot #define SLAVE_PCIE_1_CFG			22
64*5956d97fSEmmanuel Vadot #define SLAVE_PDM			23
65*5956d97fSEmmanuel Vadot #define SLAVE_PIMEM_CFG			24
66*5956d97fSEmmanuel Vadot #define SLAVE_PKA_WRAPPER_CFG			25
67*5956d97fSEmmanuel Vadot #define SLAVE_PMU_WRAPPER_CFG			26
68*5956d97fSEmmanuel Vadot #define SLAVE_QDSS_CFG			27
69*5956d97fSEmmanuel Vadot #define SLAVE_QSPI_0			28
70*5956d97fSEmmanuel Vadot #define SLAVE_QUP_0			29
71*5956d97fSEmmanuel Vadot #define SLAVE_QUP_1			30
72*5956d97fSEmmanuel Vadot #define SLAVE_SDCC_1			31
73*5956d97fSEmmanuel Vadot #define SLAVE_SDCC_2			32
74*5956d97fSEmmanuel Vadot #define SLAVE_SDCC_4			33
75*5956d97fSEmmanuel Vadot #define SLAVE_SECURITY			34
76*5956d97fSEmmanuel Vadot #define SLAVE_TCSR			35
77*5956d97fSEmmanuel Vadot #define SLAVE_TLMM			36
78*5956d97fSEmmanuel Vadot #define SLAVE_UFS_MEM_CFG			37
79*5956d97fSEmmanuel Vadot #define SLAVE_USB2			38
80*5956d97fSEmmanuel Vadot #define SLAVE_USB3_0			39
81*5956d97fSEmmanuel Vadot #define SLAVE_VENUS_CFG			40
82*5956d97fSEmmanuel Vadot #define SLAVE_VSENSE_CTRL_CFG			41
83*5956d97fSEmmanuel Vadot #define SLAVE_A1NOC_CFG			42
84*5956d97fSEmmanuel Vadot #define SLAVE_A2NOC_CFG			43
85*5956d97fSEmmanuel Vadot #define SLAVE_CNOC2_CNOC3			44
86*5956d97fSEmmanuel Vadot #define SLAVE_CNOC_MNOC_CFG			45
87*5956d97fSEmmanuel Vadot #define SLAVE_SNOC_CFG			46
88*5956d97fSEmmanuel Vadot 
89*5956d97fSEmmanuel Vadot #define MASTER_CNOC2_CNOC3			0
90*5956d97fSEmmanuel Vadot #define MASTER_GEM_NOC_CNOC			1
91*5956d97fSEmmanuel Vadot #define MASTER_GEM_NOC_PCIE_SNOC			2
92*5956d97fSEmmanuel Vadot #define SLAVE_AOSS			3
93*5956d97fSEmmanuel Vadot #define SLAVE_APPSS			4
94*5956d97fSEmmanuel Vadot #define SLAVE_CNOC3_CNOC2			5
95*5956d97fSEmmanuel Vadot #define SLAVE_CNOC_A2NOC			6
96*5956d97fSEmmanuel Vadot #define SLAVE_DDRSS_CFG			7
97*5956d97fSEmmanuel Vadot #define SLAVE_BOOT_IMEM			8
98*5956d97fSEmmanuel Vadot #define SLAVE_IMEM			9
99*5956d97fSEmmanuel Vadot #define SLAVE_PIMEM			10
100*5956d97fSEmmanuel Vadot #define SLAVE_PCIE_0			11
101*5956d97fSEmmanuel Vadot #define SLAVE_PCIE_1			12
102*5956d97fSEmmanuel Vadot #define SLAVE_QDSS_STM			13
103*5956d97fSEmmanuel Vadot #define SLAVE_TCU			14
104*5956d97fSEmmanuel Vadot 
105*5956d97fSEmmanuel Vadot #define MASTER_CNOC_DC_NOC			0
106*5956d97fSEmmanuel Vadot #define SLAVE_LLCC_CFG			1
107*5956d97fSEmmanuel Vadot #define SLAVE_GEM_NOC_CFG			2
108*5956d97fSEmmanuel Vadot 
109*5956d97fSEmmanuel Vadot #define MASTER_GPU_TCU			0
110*5956d97fSEmmanuel Vadot #define MASTER_SYS_TCU			1
111*5956d97fSEmmanuel Vadot #define MASTER_APPSS_PROC			2
112*5956d97fSEmmanuel Vadot #define MASTER_COMPUTE_NOC			3
113*5956d97fSEmmanuel Vadot #define MASTER_GEM_NOC_CFG			4
114*5956d97fSEmmanuel Vadot #define MASTER_GFX3D			5
115*5956d97fSEmmanuel Vadot #define MASTER_MNOC_HF_MEM_NOC			6
116*5956d97fSEmmanuel Vadot #define MASTER_MNOC_SF_MEM_NOC			7
117*5956d97fSEmmanuel Vadot #define MASTER_ANOC_PCIE_GEM_NOC			8
118*5956d97fSEmmanuel Vadot #define MASTER_SNOC_GC_MEM_NOC			9
119*5956d97fSEmmanuel Vadot #define MASTER_SNOC_SF_MEM_NOC			10
120*5956d97fSEmmanuel Vadot #define SLAVE_MSS_PROC_MS_MPU_CFG			11
121*5956d97fSEmmanuel Vadot #define SLAVE_MCDMA_MS_MPU_CFG			12
122*5956d97fSEmmanuel Vadot #define SLAVE_GEM_NOC_CNOC			13
123*5956d97fSEmmanuel Vadot #define SLAVE_LLCC			14
124*5956d97fSEmmanuel Vadot #define SLAVE_MEM_NOC_PCIE_SNOC			15
125*5956d97fSEmmanuel Vadot #define SLAVE_SERVICE_GEM_NOC_1			16
126*5956d97fSEmmanuel Vadot #define SLAVE_SERVICE_GEM_NOC_2			17
127*5956d97fSEmmanuel Vadot #define SLAVE_SERVICE_GEM_NOC			18
128*5956d97fSEmmanuel Vadot 
129*5956d97fSEmmanuel Vadot #define MASTER_CNOC_LPASS_AG_NOC			0
130*5956d97fSEmmanuel Vadot #define SLAVE_LPASS_CORE_CFG			1
131*5956d97fSEmmanuel Vadot #define SLAVE_LPASS_LPI_CFG			2
132*5956d97fSEmmanuel Vadot #define SLAVE_LPASS_MPU_CFG			3
133*5956d97fSEmmanuel Vadot #define SLAVE_LPASS_TOP_CFG			4
134*5956d97fSEmmanuel Vadot #define SLAVE_SERVICES_LPASS_AML_NOC			5
135*5956d97fSEmmanuel Vadot #define SLAVE_SERVICE_LPASS_AG_NOC			6
136*5956d97fSEmmanuel Vadot 
137*5956d97fSEmmanuel Vadot #define MASTER_LLCC			0
138*5956d97fSEmmanuel Vadot #define SLAVE_EBI1			1
139*5956d97fSEmmanuel Vadot 
140*5956d97fSEmmanuel Vadot #define MASTER_CNOC_MNOC_CFG			0
141*5956d97fSEmmanuel Vadot #define MASTER_VIDEO_P0			1
142*5956d97fSEmmanuel Vadot #define MASTER_VIDEO_PROC			2
143*5956d97fSEmmanuel Vadot #define MASTER_CAMNOC_HF			3
144*5956d97fSEmmanuel Vadot #define MASTER_CAMNOC_ICP			4
145*5956d97fSEmmanuel Vadot #define MASTER_CAMNOC_SF			5
146*5956d97fSEmmanuel Vadot #define MASTER_MDP0			6
147*5956d97fSEmmanuel Vadot #define SLAVE_MNOC_HF_MEM_NOC			7
148*5956d97fSEmmanuel Vadot #define SLAVE_MNOC_SF_MEM_NOC			8
149*5956d97fSEmmanuel Vadot #define SLAVE_SERVICE_MNOC			9
150*5956d97fSEmmanuel Vadot 
151*5956d97fSEmmanuel Vadot #define MASTER_CDSP_NOC_CFG			0
152*5956d97fSEmmanuel Vadot #define MASTER_CDSP_PROC			1
153*5956d97fSEmmanuel Vadot #define SLAVE_CDSP_MEM_NOC			2
154*5956d97fSEmmanuel Vadot #define SLAVE_SERVICE_NSP_NOC			3
155*5956d97fSEmmanuel Vadot 
156*5956d97fSEmmanuel Vadot #define MASTER_A1NOC_SNOC			0
157*5956d97fSEmmanuel Vadot #define MASTER_A2NOC_SNOC			1
158*5956d97fSEmmanuel Vadot #define MASTER_SNOC_CFG			2
159*5956d97fSEmmanuel Vadot #define MASTER_PIMEM			3
160*5956d97fSEmmanuel Vadot #define MASTER_GIC			4
161*5956d97fSEmmanuel Vadot #define SLAVE_SNOC_GEM_NOC_GC			5
162*5956d97fSEmmanuel Vadot #define SLAVE_SNOC_GEM_NOC_SF			6
163*5956d97fSEmmanuel Vadot #define SLAVE_SERVICE_SNOC			7
164*5956d97fSEmmanuel Vadot 
165*5956d97fSEmmanuel Vadot #endif
166