xref: /freebsd-src/sys/contrib/device-tree/include/dt-bindings/interconnect/qcom,qdu1000-rpmh.h (revision cb7aa33ac6cd46a5434798e50363136e64f3ae98)
1*cb7aa33aSEmmanuel Vadot /* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
2*cb7aa33aSEmmanuel Vadot /*
3*cb7aa33aSEmmanuel Vadot  * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
4*cb7aa33aSEmmanuel Vadot  */
5*cb7aa33aSEmmanuel Vadot 
6*cb7aa33aSEmmanuel Vadot #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_QDU1000_H
7*cb7aa33aSEmmanuel Vadot #define __DT_BINDINGS_INTERCONNECT_QCOM_QDU1000_H
8*cb7aa33aSEmmanuel Vadot 
9*cb7aa33aSEmmanuel Vadot #define MASTER_QUP_CORE_0			0
10*cb7aa33aSEmmanuel Vadot #define MASTER_QUP_CORE_1			1
11*cb7aa33aSEmmanuel Vadot #define SLAVE_QUP_CORE_0			2
12*cb7aa33aSEmmanuel Vadot #define SLAVE_QUP_CORE_1			3
13*cb7aa33aSEmmanuel Vadot 
14*cb7aa33aSEmmanuel Vadot #define MASTER_SYS_TCU				0
15*cb7aa33aSEmmanuel Vadot #define MASTER_APPSS_PROC			1
16*cb7aa33aSEmmanuel Vadot #define MASTER_GEMNOC_ECPRI_DMA			2
17*cb7aa33aSEmmanuel Vadot #define MASTER_FEC_2_GEMNOC			3
18*cb7aa33aSEmmanuel Vadot #define MASTER_ANOC_PCIE_GEM_NOC		4
19*cb7aa33aSEmmanuel Vadot #define MASTER_SNOC_GC_MEM_NOC			5
20*cb7aa33aSEmmanuel Vadot #define MASTER_SNOC_SF_MEM_NOC			6
21*cb7aa33aSEmmanuel Vadot #define MASTER_MSS_PROC				7
22*cb7aa33aSEmmanuel Vadot #define SLAVE_GEM_NOC_CNOC			8
23*cb7aa33aSEmmanuel Vadot #define SLAVE_LLCC				9
24*cb7aa33aSEmmanuel Vadot #define SLAVE_GEMNOC_MODEM_CNOC			10
25*cb7aa33aSEmmanuel Vadot #define SLAVE_MEM_NOC_PCIE_SNOC			11
26*cb7aa33aSEmmanuel Vadot 
27*cb7aa33aSEmmanuel Vadot #define MASTER_LLCC				0
28*cb7aa33aSEmmanuel Vadot #define SLAVE_EBI1				1
29*cb7aa33aSEmmanuel Vadot 
30*cb7aa33aSEmmanuel Vadot #define MASTER_GIC_AHB				0
31*cb7aa33aSEmmanuel Vadot #define MASTER_QDSS_BAM				1
32*cb7aa33aSEmmanuel Vadot #define MASTER_QPIC				2
33*cb7aa33aSEmmanuel Vadot #define MASTER_QSPI_0				3
34*cb7aa33aSEmmanuel Vadot #define MASTER_QUP_0				4
35*cb7aa33aSEmmanuel Vadot #define MASTER_QUP_1				5
36*cb7aa33aSEmmanuel Vadot #define MASTER_SNOC_CFG				6
37*cb7aa33aSEmmanuel Vadot #define MASTER_ANOC_SNOC			7
38*cb7aa33aSEmmanuel Vadot #define MASTER_ANOC_GSI				8
39*cb7aa33aSEmmanuel Vadot #define MASTER_GEM_NOC_CNOC			9
40*cb7aa33aSEmmanuel Vadot #define MASTER_GEMNOC_MODEM_CNOC		10
41*cb7aa33aSEmmanuel Vadot #define MASTER_GEM_NOC_PCIE_SNOC		11
42*cb7aa33aSEmmanuel Vadot #define MASTER_CRYPTO				12
43*cb7aa33aSEmmanuel Vadot #define MASTER_ECPRI_GSI			13
44*cb7aa33aSEmmanuel Vadot #define MASTER_PIMEM				14
45*cb7aa33aSEmmanuel Vadot #define MASTER_SNOC_ECPRI_DMA			15
46*cb7aa33aSEmmanuel Vadot #define MASTER_GIC				16
47*cb7aa33aSEmmanuel Vadot #define MASTER_PCIE				17
48*cb7aa33aSEmmanuel Vadot #define MASTER_QDSS_ETR				18
49*cb7aa33aSEmmanuel Vadot #define MASTER_QDSS_ETR_1			19
50*cb7aa33aSEmmanuel Vadot #define MASTER_SDCC_1				20
51*cb7aa33aSEmmanuel Vadot #define MASTER_USB3				21
52*cb7aa33aSEmmanuel Vadot #define SLAVE_AHB2PHY_SOUTH			22
53*cb7aa33aSEmmanuel Vadot #define SLAVE_AHB2PHY_NORTH			23
54*cb7aa33aSEmmanuel Vadot #define SLAVE_AHB2PHY_EAST			24
55*cb7aa33aSEmmanuel Vadot #define SLAVE_AOSS				25
56*cb7aa33aSEmmanuel Vadot #define SLAVE_CLK_CTL				26
57*cb7aa33aSEmmanuel Vadot #define SLAVE_RBCPR_CX_CFG			27
58*cb7aa33aSEmmanuel Vadot #define SLAVE_RBCPR_MX_CFG			28
59*cb7aa33aSEmmanuel Vadot #define SLAVE_CRYPTO_0_CFG			29
60*cb7aa33aSEmmanuel Vadot #define SLAVE_ECPRI_CFG				30
61*cb7aa33aSEmmanuel Vadot #define SLAVE_IMEM_CFG				31
62*cb7aa33aSEmmanuel Vadot #define SLAVE_IPC_ROUTER_CFG			32
63*cb7aa33aSEmmanuel Vadot #define SLAVE_CNOC_MSS				33
64*cb7aa33aSEmmanuel Vadot #define SLAVE_PCIE_CFG				34
65*cb7aa33aSEmmanuel Vadot #define SLAVE_PDM				35
66*cb7aa33aSEmmanuel Vadot #define SLAVE_PIMEM_CFG				36
67*cb7aa33aSEmmanuel Vadot #define SLAVE_PRNG				37
68*cb7aa33aSEmmanuel Vadot #define SLAVE_QDSS_CFG				38
69*cb7aa33aSEmmanuel Vadot #define SLAVE_QPIC				40
70*cb7aa33aSEmmanuel Vadot #define SLAVE_QSPI_0				41
71*cb7aa33aSEmmanuel Vadot #define SLAVE_QUP_0				42
72*cb7aa33aSEmmanuel Vadot #define SLAVE_QUP_1				43
73*cb7aa33aSEmmanuel Vadot #define SLAVE_SDCC_2				44
74*cb7aa33aSEmmanuel Vadot #define SLAVE_SMBUS_CFG				45
75*cb7aa33aSEmmanuel Vadot #define SLAVE_SNOC_CFG				46
76*cb7aa33aSEmmanuel Vadot #define SLAVE_TCSR				47
77*cb7aa33aSEmmanuel Vadot #define SLAVE_TLMM				48
78*cb7aa33aSEmmanuel Vadot #define SLAVE_TME_CFG				49
79*cb7aa33aSEmmanuel Vadot #define SLAVE_TSC_CFG				50
80*cb7aa33aSEmmanuel Vadot #define SLAVE_USB3_0				51
81*cb7aa33aSEmmanuel Vadot #define SLAVE_VSENSE_CTRL_CFG			52
82*cb7aa33aSEmmanuel Vadot #define SLAVE_A1NOC_SNOC			53
83*cb7aa33aSEmmanuel Vadot #define SLAVE_ANOC_SNOC_GSI			54
84*cb7aa33aSEmmanuel Vadot #define SLAVE_DDRSS_CFG				55
85*cb7aa33aSEmmanuel Vadot #define SLAVE_ECPRI_GEMNOC			56
86*cb7aa33aSEmmanuel Vadot #define SLAVE_SNOC_GEM_NOC_GC			57
87*cb7aa33aSEmmanuel Vadot #define SLAVE_SNOC_GEM_NOC_SF			58
88*cb7aa33aSEmmanuel Vadot #define SLAVE_MODEM_OFFLINE			59
89*cb7aa33aSEmmanuel Vadot #define SLAVE_ANOC_PCIE_GEM_NOC			60
90*cb7aa33aSEmmanuel Vadot #define SLAVE_IMEM				61
91*cb7aa33aSEmmanuel Vadot #define SLAVE_PIMEM				62
92*cb7aa33aSEmmanuel Vadot #define SLAVE_SERVICE_SNOC			63
93*cb7aa33aSEmmanuel Vadot #define SLAVE_ETHERNET_SS			64
94*cb7aa33aSEmmanuel Vadot #define SLAVE_PCIE_0				65
95*cb7aa33aSEmmanuel Vadot #define SLAVE_QDSS_STM				66
96*cb7aa33aSEmmanuel Vadot #define SLAVE_TCU				67
97*cb7aa33aSEmmanuel Vadot 
98*cb7aa33aSEmmanuel Vadot #endif
99