1*5def4c47SEmmanuel Vadot /* SPDX-License-Identifier: GPL-2.0 */ 2*5def4c47SEmmanuel Vadot /* 3*5def4c47SEmmanuel Vadot * Qualcomm interconnect IDs 4*5def4c47SEmmanuel Vadot * 5*5def4c47SEmmanuel Vadot * Copyright (c) 2020, Linaro Ltd. 6*5def4c47SEmmanuel Vadot * Author: Jun Nie <jun.nie@linaro.org> 7*5def4c47SEmmanuel Vadot */ 8*5def4c47SEmmanuel Vadot 9*5def4c47SEmmanuel Vadot #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_MSM8939_H 10*5def4c47SEmmanuel Vadot #define __DT_BINDINGS_INTERCONNECT_QCOM_MSM8939_H 11*5def4c47SEmmanuel Vadot 12*5def4c47SEmmanuel Vadot #define BIMC_SNOC_SLV 0 13*5def4c47SEmmanuel Vadot #define MASTER_QDSS_BAM 1 14*5def4c47SEmmanuel Vadot #define MASTER_QDSS_ETR 2 15*5def4c47SEmmanuel Vadot #define MASTER_SNOC_CFG 3 16*5def4c47SEmmanuel Vadot #define PCNOC_SNOC_SLV 4 17*5def4c47SEmmanuel Vadot #define SLAVE_APSS 5 18*5def4c47SEmmanuel Vadot #define SLAVE_CATS_128 6 19*5def4c47SEmmanuel Vadot #define SLAVE_OCMEM_64 7 20*5def4c47SEmmanuel Vadot #define SLAVE_IMEM 8 21*5def4c47SEmmanuel Vadot #define SLAVE_QDSS_STM 9 22*5def4c47SEmmanuel Vadot #define SLAVE_SRVC_SNOC 10 23*5def4c47SEmmanuel Vadot #define SNOC_BIMC_0_MAS 11 24*5def4c47SEmmanuel Vadot #define SNOC_BIMC_1_MAS 12 25*5def4c47SEmmanuel Vadot #define SNOC_BIMC_2_MAS 13 26*5def4c47SEmmanuel Vadot #define SNOC_INT_0 14 27*5def4c47SEmmanuel Vadot #define SNOC_INT_1 15 28*5def4c47SEmmanuel Vadot #define SNOC_INT_BIMC 16 29*5def4c47SEmmanuel Vadot #define SNOC_PCNOC_MAS 17 30*5def4c47SEmmanuel Vadot #define SNOC_QDSS_INT 18 31*5def4c47SEmmanuel Vadot 32*5def4c47SEmmanuel Vadot #define MASTER_VIDEO_P0 0 33*5def4c47SEmmanuel Vadot #define MASTER_JPEG 1 34*5def4c47SEmmanuel Vadot #define MASTER_VFE 2 35*5def4c47SEmmanuel Vadot #define MASTER_MDP_PORT0 3 36*5def4c47SEmmanuel Vadot #define MASTER_MDP_PORT1 4 37*5def4c47SEmmanuel Vadot #define MASTER_CPP 5 38*5def4c47SEmmanuel Vadot #define SNOC_MM_INT_0 6 39*5def4c47SEmmanuel Vadot #define SNOC_MM_INT_1 7 40*5def4c47SEmmanuel Vadot #define SNOC_MM_INT_2 8 41*5def4c47SEmmanuel Vadot 42*5def4c47SEmmanuel Vadot #define BIMC_SNOC_MAS 0 43*5def4c47SEmmanuel Vadot #define MASTER_AMPSS_M0 1 44*5def4c47SEmmanuel Vadot #define MASTER_GRAPHICS_3D 2 45*5def4c47SEmmanuel Vadot #define MASTER_TCU0 3 46*5def4c47SEmmanuel Vadot #define SLAVE_AMPSS_L2 4 47*5def4c47SEmmanuel Vadot #define SLAVE_EBI_CH0 5 48*5def4c47SEmmanuel Vadot #define SNOC_BIMC_0_SLV 6 49*5def4c47SEmmanuel Vadot #define SNOC_BIMC_1_SLV 7 50*5def4c47SEmmanuel Vadot #define SNOC_BIMC_2_SLV 8 51*5def4c47SEmmanuel Vadot 52*5def4c47SEmmanuel Vadot #define MASTER_BLSP_1 0 53*5def4c47SEmmanuel Vadot #define MASTER_DEHR 1 54*5def4c47SEmmanuel Vadot #define MASTER_LPASS 2 55*5def4c47SEmmanuel Vadot #define MASTER_CRYPTO_CORE0 3 56*5def4c47SEmmanuel Vadot #define MASTER_SDCC_1 4 57*5def4c47SEmmanuel Vadot #define MASTER_SDCC_2 5 58*5def4c47SEmmanuel Vadot #define MASTER_SPDM 6 59*5def4c47SEmmanuel Vadot #define MASTER_USB_HS1 7 60*5def4c47SEmmanuel Vadot #define MASTER_USB_HS2 8 61*5def4c47SEmmanuel Vadot #define PCNOC_INT_0 9 62*5def4c47SEmmanuel Vadot #define PCNOC_INT_1 10 63*5def4c47SEmmanuel Vadot #define PCNOC_MAS_0 11 64*5def4c47SEmmanuel Vadot #define PCNOC_MAS_1 12 65*5def4c47SEmmanuel Vadot #define PCNOC_SLV_0 13 66*5def4c47SEmmanuel Vadot #define PCNOC_SLV_1 14 67*5def4c47SEmmanuel Vadot #define PCNOC_SLV_2 15 68*5def4c47SEmmanuel Vadot #define PCNOC_SLV_3 16 69*5def4c47SEmmanuel Vadot #define PCNOC_SLV_4 17 70*5def4c47SEmmanuel Vadot #define PCNOC_SLV_8 18 71*5def4c47SEmmanuel Vadot #define PCNOC_SLV_9 19 72*5def4c47SEmmanuel Vadot #define PCNOC_SNOC_MAS 20 73*5def4c47SEmmanuel Vadot #define SLAVE_BIMC_CFG 21 74*5def4c47SEmmanuel Vadot #define SLAVE_BLSP_1 22 75*5def4c47SEmmanuel Vadot #define SLAVE_BOOT_ROM 23 76*5def4c47SEmmanuel Vadot #define SLAVE_CAMERA_CFG 24 77*5def4c47SEmmanuel Vadot #define SLAVE_CLK_CTL 25 78*5def4c47SEmmanuel Vadot #define SLAVE_CRYPTO_0_CFG 26 79*5def4c47SEmmanuel Vadot #define SLAVE_DEHR_CFG 27 80*5def4c47SEmmanuel Vadot #define SLAVE_DISPLAY_CFG 28 81*5def4c47SEmmanuel Vadot #define SLAVE_GRAPHICS_3D_CFG 29 82*5def4c47SEmmanuel Vadot #define SLAVE_IMEM_CFG 30 83*5def4c47SEmmanuel Vadot #define SLAVE_LPASS 31 84*5def4c47SEmmanuel Vadot #define SLAVE_MPM 32 85*5def4c47SEmmanuel Vadot #define SLAVE_MSG_RAM 33 86*5def4c47SEmmanuel Vadot #define SLAVE_MSS 34 87*5def4c47SEmmanuel Vadot #define SLAVE_PDM 35 88*5def4c47SEmmanuel Vadot #define SLAVE_PMIC_ARB 36 89*5def4c47SEmmanuel Vadot #define SLAVE_PCNOC_CFG 37 90*5def4c47SEmmanuel Vadot #define SLAVE_PRNG 38 91*5def4c47SEmmanuel Vadot #define SLAVE_QDSS_CFG 39 92*5def4c47SEmmanuel Vadot #define SLAVE_RBCPR_CFG 40 93*5def4c47SEmmanuel Vadot #define SLAVE_SDCC_1 41 94*5def4c47SEmmanuel Vadot #define SLAVE_SDCC_2 42 95*5def4c47SEmmanuel Vadot #define SLAVE_SECURITY 43 96*5def4c47SEmmanuel Vadot #define SLAVE_SNOC_CFG 44 97*5def4c47SEmmanuel Vadot #define SLAVE_SPDM 45 98*5def4c47SEmmanuel Vadot #define SLAVE_TCSR 46 99*5def4c47SEmmanuel Vadot #define SLAVE_TLMM 47 100*5def4c47SEmmanuel Vadot #define SLAVE_USB_HS1 48 101*5def4c47SEmmanuel Vadot #define SLAVE_USB_HS2 49 102*5def4c47SEmmanuel Vadot #define SLAVE_VENUS_CFG 50 103*5def4c47SEmmanuel Vadot #define SNOC_PCNOC_SLV 51 104*5def4c47SEmmanuel Vadot 105*5def4c47SEmmanuel Vadot #endif 106