1*5def4c47SEmmanuel Vadot /* SPDX-License-Identifier: GPL-2.0-only */ 2*5def4c47SEmmanuel Vadot /* 3*5def4c47SEmmanuel Vadot * This header provides macros for X2000 DMA bindings. 4*5def4c47SEmmanuel Vadot * 5*5def4c47SEmmanuel Vadot * Copyright (c) 2020 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> 6*5def4c47SEmmanuel Vadot */ 7*5def4c47SEmmanuel Vadot 8*5def4c47SEmmanuel Vadot #ifndef __DT_BINDINGS_DMA_X2000_DMA_H__ 9*5def4c47SEmmanuel Vadot #define __DT_BINDINGS_DMA_X2000_DMA_H__ 10*5def4c47SEmmanuel Vadot 11*5def4c47SEmmanuel Vadot /* 12*5def4c47SEmmanuel Vadot * Request type numbers for the X2000 DMA controller (written to the DRTn 13*5def4c47SEmmanuel Vadot * register for the channel). 14*5def4c47SEmmanuel Vadot */ 15*5def4c47SEmmanuel Vadot #define X2000_DMA_AUTO 0x8 16*5def4c47SEmmanuel Vadot #define X2000_DMA_UART5_TX 0xa 17*5def4c47SEmmanuel Vadot #define X2000_DMA_UART5_RX 0xb 18*5def4c47SEmmanuel Vadot #define X2000_DMA_UART4_TX 0xc 19*5def4c47SEmmanuel Vadot #define X2000_DMA_UART4_RX 0xd 20*5def4c47SEmmanuel Vadot #define X2000_DMA_UART3_TX 0xe 21*5def4c47SEmmanuel Vadot #define X2000_DMA_UART3_RX 0xf 22*5def4c47SEmmanuel Vadot #define X2000_DMA_UART2_TX 0x10 23*5def4c47SEmmanuel Vadot #define X2000_DMA_UART2_RX 0x11 24*5def4c47SEmmanuel Vadot #define X2000_DMA_UART1_TX 0x12 25*5def4c47SEmmanuel Vadot #define X2000_DMA_UART1_RX 0x13 26*5def4c47SEmmanuel Vadot #define X2000_DMA_UART0_TX 0x14 27*5def4c47SEmmanuel Vadot #define X2000_DMA_UART0_RX 0x15 28*5def4c47SEmmanuel Vadot #define X2000_DMA_SSI0_TX 0x16 29*5def4c47SEmmanuel Vadot #define X2000_DMA_SSI0_RX 0x17 30*5def4c47SEmmanuel Vadot #define X2000_DMA_SSI1_TX 0x18 31*5def4c47SEmmanuel Vadot #define X2000_DMA_SSI1_RX 0x19 32*5def4c47SEmmanuel Vadot #define X2000_DMA_I2C0_TX 0x24 33*5def4c47SEmmanuel Vadot #define X2000_DMA_I2C0_RX 0x25 34*5def4c47SEmmanuel Vadot #define X2000_DMA_I2C1_TX 0x26 35*5def4c47SEmmanuel Vadot #define X2000_DMA_I2C1_RX 0x27 36*5def4c47SEmmanuel Vadot #define X2000_DMA_I2C2_TX 0x28 37*5def4c47SEmmanuel Vadot #define X2000_DMA_I2C2_RX 0x29 38*5def4c47SEmmanuel Vadot #define X2000_DMA_I2C3_TX 0x2a 39*5def4c47SEmmanuel Vadot #define X2000_DMA_I2C3_RX 0x2b 40*5def4c47SEmmanuel Vadot #define X2000_DMA_I2C4_TX 0x2c 41*5def4c47SEmmanuel Vadot #define X2000_DMA_I2C4_RX 0x2d 42*5def4c47SEmmanuel Vadot #define X2000_DMA_I2C5_TX 0x2e 43*5def4c47SEmmanuel Vadot #define X2000_DMA_I2C5_RX 0x2f 44*5def4c47SEmmanuel Vadot #define X2000_DMA_UART6_TX 0x30 45*5def4c47SEmmanuel Vadot #define X2000_DMA_UART6_RX 0x31 46*5def4c47SEmmanuel Vadot #define X2000_DMA_UART7_TX 0x32 47*5def4c47SEmmanuel Vadot #define X2000_DMA_UART7_RX 0x33 48*5def4c47SEmmanuel Vadot #define X2000_DMA_UART8_TX 0x34 49*5def4c47SEmmanuel Vadot #define X2000_DMA_UART8_RX 0x35 50*5def4c47SEmmanuel Vadot #define X2000_DMA_UART9_TX 0x36 51*5def4c47SEmmanuel Vadot #define X2000_DMA_UART9_RX 0x37 52*5def4c47SEmmanuel Vadot #define X2000_DMA_SADC_RX 0x38 53*5def4c47SEmmanuel Vadot 54*5def4c47SEmmanuel Vadot #endif /* __DT_BINDINGS_DMA_X2000_DMA_H__ */ 55