1*c66ec88fSEmmanuel Vadot /* SPDX-License-Identifier: GPL-2.0-only */ 2*c66ec88fSEmmanuel Vadot /* 3*c66ec88fSEmmanuel Vadot * This header provides macros for X1830 DMA bindings. 4*c66ec88fSEmmanuel Vadot * 5*c66ec88fSEmmanuel Vadot * Copyright (c) 2019 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> 6*c66ec88fSEmmanuel Vadot */ 7*c66ec88fSEmmanuel Vadot 8*c66ec88fSEmmanuel Vadot #ifndef __DT_BINDINGS_DMA_X1830_DMA_H__ 9*c66ec88fSEmmanuel Vadot #define __DT_BINDINGS_DMA_X1830_DMA_H__ 10*c66ec88fSEmmanuel Vadot 11*c66ec88fSEmmanuel Vadot /* 12*c66ec88fSEmmanuel Vadot * Request type numbers for the X1830 DMA controller (written to the DRTn 13*c66ec88fSEmmanuel Vadot * register for the channel). 14*c66ec88fSEmmanuel Vadot */ 15*c66ec88fSEmmanuel Vadot #define X1830_DMA_I2S0_TX 0x6 16*c66ec88fSEmmanuel Vadot #define X1830_DMA_I2S0_RX 0x7 17*c66ec88fSEmmanuel Vadot #define X1830_DMA_AUTO 0x8 18*c66ec88fSEmmanuel Vadot #define X1830_DMA_SADC_RX 0x9 19*c66ec88fSEmmanuel Vadot #define X1830_DMA_UART1_TX 0x12 20*c66ec88fSEmmanuel Vadot #define X1830_DMA_UART1_RX 0x13 21*c66ec88fSEmmanuel Vadot #define X1830_DMA_UART0_TX 0x14 22*c66ec88fSEmmanuel Vadot #define X1830_DMA_UART0_RX 0x15 23*c66ec88fSEmmanuel Vadot #define X1830_DMA_SSI0_TX 0x16 24*c66ec88fSEmmanuel Vadot #define X1830_DMA_SSI0_RX 0x17 25*c66ec88fSEmmanuel Vadot #define X1830_DMA_SSI1_TX 0x18 26*c66ec88fSEmmanuel Vadot #define X1830_DMA_SSI1_RX 0x19 27*c66ec88fSEmmanuel Vadot #define X1830_DMA_MSC0_TX 0x1a 28*c66ec88fSEmmanuel Vadot #define X1830_DMA_MSC0_RX 0x1b 29*c66ec88fSEmmanuel Vadot #define X1830_DMA_MSC1_TX 0x1c 30*c66ec88fSEmmanuel Vadot #define X1830_DMA_MSC1_RX 0x1d 31*c66ec88fSEmmanuel Vadot #define X1830_DMA_DMIC_RX 0x21 32*c66ec88fSEmmanuel Vadot #define X1830_DMA_SMB0_TX 0x24 33*c66ec88fSEmmanuel Vadot #define X1830_DMA_SMB0_RX 0x25 34*c66ec88fSEmmanuel Vadot #define X1830_DMA_SMB1_TX 0x26 35*c66ec88fSEmmanuel Vadot #define X1830_DMA_SMB1_RX 0x27 36*c66ec88fSEmmanuel Vadot #define X1830_DMA_DES_TX 0x2e 37*c66ec88fSEmmanuel Vadot #define X1830_DMA_DES_RX 0x2f 38*c66ec88fSEmmanuel Vadot 39*c66ec88fSEmmanuel Vadot #endif /* __DT_BINDINGS_DMA_X1830_DMA_H__ */ 40