1*aa1a8ff2SEmmanuel Vadot /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ 2c66ec88fSEmmanuel Vadot /* 3c66ec88fSEmmanuel Vadot * Copyright (C) STMicroelectronics 2018 - All Rights Reserved 4c66ec88fSEmmanuel Vadot * Author: Gabriel Fernandez <gabriel.fernandez@st.com> for STMicroelectronics. 5c66ec88fSEmmanuel Vadot */ 6c66ec88fSEmmanuel Vadot 7c66ec88fSEmmanuel Vadot #ifndef _DT_BINDINGS_STM32MP1_CLKS_H_ 8c66ec88fSEmmanuel Vadot #define _DT_BINDINGS_STM32MP1_CLKS_H_ 9c66ec88fSEmmanuel Vadot 10c66ec88fSEmmanuel Vadot /* OSCILLATOR clocks */ 11c66ec88fSEmmanuel Vadot #define CK_HSE 0 12c66ec88fSEmmanuel Vadot #define CK_CSI 1 13c66ec88fSEmmanuel Vadot #define CK_LSI 2 14c66ec88fSEmmanuel Vadot #define CK_LSE 3 15c66ec88fSEmmanuel Vadot #define CK_HSI 4 16c66ec88fSEmmanuel Vadot #define CK_HSE_DIV2 5 17c66ec88fSEmmanuel Vadot 18c66ec88fSEmmanuel Vadot /* Bus clocks */ 19c66ec88fSEmmanuel Vadot #define TIM2 6 20c66ec88fSEmmanuel Vadot #define TIM3 7 21c66ec88fSEmmanuel Vadot #define TIM4 8 22c66ec88fSEmmanuel Vadot #define TIM5 9 23c66ec88fSEmmanuel Vadot #define TIM6 10 24c66ec88fSEmmanuel Vadot #define TIM7 11 25c66ec88fSEmmanuel Vadot #define TIM12 12 26c66ec88fSEmmanuel Vadot #define TIM13 13 27c66ec88fSEmmanuel Vadot #define TIM14 14 28c66ec88fSEmmanuel Vadot #define LPTIM1 15 29c66ec88fSEmmanuel Vadot #define SPI2 16 30c66ec88fSEmmanuel Vadot #define SPI3 17 31c66ec88fSEmmanuel Vadot #define USART2 18 32c66ec88fSEmmanuel Vadot #define USART3 19 33c66ec88fSEmmanuel Vadot #define UART4 20 34c66ec88fSEmmanuel Vadot #define UART5 21 35c66ec88fSEmmanuel Vadot #define UART7 22 36c66ec88fSEmmanuel Vadot #define UART8 23 37c66ec88fSEmmanuel Vadot #define I2C1 24 38c66ec88fSEmmanuel Vadot #define I2C2 25 39c66ec88fSEmmanuel Vadot #define I2C3 26 40c66ec88fSEmmanuel Vadot #define I2C5 27 41c66ec88fSEmmanuel Vadot #define SPDIF 28 42c66ec88fSEmmanuel Vadot #define CEC 29 43c66ec88fSEmmanuel Vadot #define DAC12 30 44c66ec88fSEmmanuel Vadot #define MDIO 31 45c66ec88fSEmmanuel Vadot #define TIM1 32 46c66ec88fSEmmanuel Vadot #define TIM8 33 47c66ec88fSEmmanuel Vadot #define TIM15 34 48c66ec88fSEmmanuel Vadot #define TIM16 35 49c66ec88fSEmmanuel Vadot #define TIM17 36 50c66ec88fSEmmanuel Vadot #define SPI1 37 51c66ec88fSEmmanuel Vadot #define SPI4 38 52c66ec88fSEmmanuel Vadot #define SPI5 39 53c66ec88fSEmmanuel Vadot #define USART6 40 54c66ec88fSEmmanuel Vadot #define SAI1 41 55c66ec88fSEmmanuel Vadot #define SAI2 42 56c66ec88fSEmmanuel Vadot #define SAI3 43 57c66ec88fSEmmanuel Vadot #define DFSDM 44 58c66ec88fSEmmanuel Vadot #define FDCAN 45 59c66ec88fSEmmanuel Vadot #define LPTIM2 46 60c66ec88fSEmmanuel Vadot #define LPTIM3 47 61c66ec88fSEmmanuel Vadot #define LPTIM4 48 62c66ec88fSEmmanuel Vadot #define LPTIM5 49 63c66ec88fSEmmanuel Vadot #define SAI4 50 64c66ec88fSEmmanuel Vadot #define SYSCFG 51 65c66ec88fSEmmanuel Vadot #define VREF 52 66c66ec88fSEmmanuel Vadot #define TMPSENS 53 67c66ec88fSEmmanuel Vadot #define PMBCTRL 54 68c66ec88fSEmmanuel Vadot #define HDP 55 69c66ec88fSEmmanuel Vadot #define LTDC 56 70c66ec88fSEmmanuel Vadot #define DSI 57 71c66ec88fSEmmanuel Vadot #define IWDG2 58 72c66ec88fSEmmanuel Vadot #define USBPHY 59 73c66ec88fSEmmanuel Vadot #define STGENRO 60 74c66ec88fSEmmanuel Vadot #define SPI6 61 75c66ec88fSEmmanuel Vadot #define I2C4 62 76c66ec88fSEmmanuel Vadot #define I2C6 63 77c66ec88fSEmmanuel Vadot #define USART1 64 78c66ec88fSEmmanuel Vadot #define RTCAPB 65 79c66ec88fSEmmanuel Vadot #define TZC1 66 80c66ec88fSEmmanuel Vadot #define TZPC 67 81c66ec88fSEmmanuel Vadot #define IWDG1 68 82c66ec88fSEmmanuel Vadot #define BSEC 69 83c66ec88fSEmmanuel Vadot #define STGEN 70 84c66ec88fSEmmanuel Vadot #define DMA1 71 85c66ec88fSEmmanuel Vadot #define DMA2 72 86c66ec88fSEmmanuel Vadot #define DMAMUX 73 87c66ec88fSEmmanuel Vadot #define ADC12 74 88c66ec88fSEmmanuel Vadot #define USBO 75 89c66ec88fSEmmanuel Vadot #define SDMMC3 76 90c66ec88fSEmmanuel Vadot #define DCMI 77 91c66ec88fSEmmanuel Vadot #define CRYP2 78 92c66ec88fSEmmanuel Vadot #define HASH2 79 93c66ec88fSEmmanuel Vadot #define RNG2 80 94c66ec88fSEmmanuel Vadot #define CRC2 81 95c66ec88fSEmmanuel Vadot #define HSEM 82 96c66ec88fSEmmanuel Vadot #define IPCC 83 97c66ec88fSEmmanuel Vadot #define GPIOA 84 98c66ec88fSEmmanuel Vadot #define GPIOB 85 99c66ec88fSEmmanuel Vadot #define GPIOC 86 100c66ec88fSEmmanuel Vadot #define GPIOD 87 101c66ec88fSEmmanuel Vadot #define GPIOE 88 102c66ec88fSEmmanuel Vadot #define GPIOF 89 103c66ec88fSEmmanuel Vadot #define GPIOG 90 104c66ec88fSEmmanuel Vadot #define GPIOH 91 105c66ec88fSEmmanuel Vadot #define GPIOI 92 106c66ec88fSEmmanuel Vadot #define GPIOJ 93 107c66ec88fSEmmanuel Vadot #define GPIOK 94 108c66ec88fSEmmanuel Vadot #define GPIOZ 95 109c66ec88fSEmmanuel Vadot #define CRYP1 96 110c66ec88fSEmmanuel Vadot #define HASH1 97 111c66ec88fSEmmanuel Vadot #define RNG1 98 112c66ec88fSEmmanuel Vadot #define BKPSRAM 99 113c66ec88fSEmmanuel Vadot #define MDMA 100 114c66ec88fSEmmanuel Vadot #define GPU 101 115c66ec88fSEmmanuel Vadot #define ETHCK 102 116c66ec88fSEmmanuel Vadot #define ETHTX 103 117c66ec88fSEmmanuel Vadot #define ETHRX 104 118c66ec88fSEmmanuel Vadot #define ETHMAC 105 119c66ec88fSEmmanuel Vadot #define FMC 106 120c66ec88fSEmmanuel Vadot #define QSPI 107 121c66ec88fSEmmanuel Vadot #define SDMMC1 108 122c66ec88fSEmmanuel Vadot #define SDMMC2 109 123c66ec88fSEmmanuel Vadot #define CRC1 110 124c66ec88fSEmmanuel Vadot #define USBH 111 125c66ec88fSEmmanuel Vadot #define ETHSTP 112 126c66ec88fSEmmanuel Vadot #define TZC2 113 127c66ec88fSEmmanuel Vadot 128c66ec88fSEmmanuel Vadot /* Kernel clocks */ 129c66ec88fSEmmanuel Vadot #define SDMMC1_K 118 130c66ec88fSEmmanuel Vadot #define SDMMC2_K 119 131c66ec88fSEmmanuel Vadot #define SDMMC3_K 120 132c66ec88fSEmmanuel Vadot #define FMC_K 121 133c66ec88fSEmmanuel Vadot #define QSPI_K 122 134c66ec88fSEmmanuel Vadot #define ETHCK_K 123 135c66ec88fSEmmanuel Vadot #define RNG1_K 124 136c66ec88fSEmmanuel Vadot #define RNG2_K 125 137c66ec88fSEmmanuel Vadot #define GPU_K 126 138c66ec88fSEmmanuel Vadot #define USBPHY_K 127 139c66ec88fSEmmanuel Vadot #define STGEN_K 128 140c66ec88fSEmmanuel Vadot #define SPDIF_K 129 141c66ec88fSEmmanuel Vadot #define SPI1_K 130 142c66ec88fSEmmanuel Vadot #define SPI2_K 131 143c66ec88fSEmmanuel Vadot #define SPI3_K 132 144c66ec88fSEmmanuel Vadot #define SPI4_K 133 145c66ec88fSEmmanuel Vadot #define SPI5_K 134 146c66ec88fSEmmanuel Vadot #define SPI6_K 135 147c66ec88fSEmmanuel Vadot #define CEC_K 136 148c66ec88fSEmmanuel Vadot #define I2C1_K 137 149c66ec88fSEmmanuel Vadot #define I2C2_K 138 150c66ec88fSEmmanuel Vadot #define I2C3_K 139 151c66ec88fSEmmanuel Vadot #define I2C4_K 140 152c66ec88fSEmmanuel Vadot #define I2C5_K 141 153c66ec88fSEmmanuel Vadot #define I2C6_K 142 154c66ec88fSEmmanuel Vadot #define LPTIM1_K 143 155c66ec88fSEmmanuel Vadot #define LPTIM2_K 144 156c66ec88fSEmmanuel Vadot #define LPTIM3_K 145 157c66ec88fSEmmanuel Vadot #define LPTIM4_K 146 158c66ec88fSEmmanuel Vadot #define LPTIM5_K 147 159c66ec88fSEmmanuel Vadot #define USART1_K 148 160c66ec88fSEmmanuel Vadot #define USART2_K 149 161c66ec88fSEmmanuel Vadot #define USART3_K 150 162c66ec88fSEmmanuel Vadot #define UART4_K 151 163c66ec88fSEmmanuel Vadot #define UART5_K 152 164c66ec88fSEmmanuel Vadot #define USART6_K 153 165c66ec88fSEmmanuel Vadot #define UART7_K 154 166c66ec88fSEmmanuel Vadot #define UART8_K 155 167c66ec88fSEmmanuel Vadot #define DFSDM_K 156 168c66ec88fSEmmanuel Vadot #define FDCAN_K 157 169c66ec88fSEmmanuel Vadot #define SAI1_K 158 170c66ec88fSEmmanuel Vadot #define SAI2_K 159 171c66ec88fSEmmanuel Vadot #define SAI3_K 160 172c66ec88fSEmmanuel Vadot #define SAI4_K 161 173c66ec88fSEmmanuel Vadot #define ADC12_K 162 174c66ec88fSEmmanuel Vadot #define DSI_K 163 175c66ec88fSEmmanuel Vadot #define DSI_PX 164 176c66ec88fSEmmanuel Vadot #define ADFSDM_K 165 177c66ec88fSEmmanuel Vadot #define USBO_K 166 178c66ec88fSEmmanuel Vadot #define LTDC_PX 167 179c66ec88fSEmmanuel Vadot #define DAC12_K 168 180c66ec88fSEmmanuel Vadot #define ETHPTP_K 169 181c66ec88fSEmmanuel Vadot 182c66ec88fSEmmanuel Vadot /* PLL */ 183c66ec88fSEmmanuel Vadot #define PLL1 176 184c66ec88fSEmmanuel Vadot #define PLL2 177 185c66ec88fSEmmanuel Vadot #define PLL3 178 186c66ec88fSEmmanuel Vadot #define PLL4 179 187c66ec88fSEmmanuel Vadot 188c66ec88fSEmmanuel Vadot /* ODF */ 189c66ec88fSEmmanuel Vadot #define PLL1_P 180 190c66ec88fSEmmanuel Vadot #define PLL1_Q 181 191c66ec88fSEmmanuel Vadot #define PLL1_R 182 192c66ec88fSEmmanuel Vadot #define PLL2_P 183 193c66ec88fSEmmanuel Vadot #define PLL2_Q 184 194c66ec88fSEmmanuel Vadot #define PLL2_R 185 195c66ec88fSEmmanuel Vadot #define PLL3_P 186 196c66ec88fSEmmanuel Vadot #define PLL3_Q 187 197c66ec88fSEmmanuel Vadot #define PLL3_R 188 198c66ec88fSEmmanuel Vadot #define PLL4_P 189 199c66ec88fSEmmanuel Vadot #define PLL4_Q 190 200c66ec88fSEmmanuel Vadot #define PLL4_R 191 201c66ec88fSEmmanuel Vadot 202c66ec88fSEmmanuel Vadot /* AUX */ 203c66ec88fSEmmanuel Vadot #define RTC 192 204c66ec88fSEmmanuel Vadot 205c66ec88fSEmmanuel Vadot /* MCLK */ 206c66ec88fSEmmanuel Vadot #define CK_PER 193 207c66ec88fSEmmanuel Vadot #define CK_MPU 194 208c66ec88fSEmmanuel Vadot #define CK_AXI 195 209c66ec88fSEmmanuel Vadot #define CK_MCU 196 210c66ec88fSEmmanuel Vadot 211c66ec88fSEmmanuel Vadot /* Time base */ 212c66ec88fSEmmanuel Vadot #define TIM2_K 197 213c66ec88fSEmmanuel Vadot #define TIM3_K 198 214c66ec88fSEmmanuel Vadot #define TIM4_K 199 215c66ec88fSEmmanuel Vadot #define TIM5_K 200 216c66ec88fSEmmanuel Vadot #define TIM6_K 201 217c66ec88fSEmmanuel Vadot #define TIM7_K 202 218c66ec88fSEmmanuel Vadot #define TIM12_K 203 219c66ec88fSEmmanuel Vadot #define TIM13_K 204 220c66ec88fSEmmanuel Vadot #define TIM14_K 205 221c66ec88fSEmmanuel Vadot #define TIM1_K 206 222c66ec88fSEmmanuel Vadot #define TIM8_K 207 223c66ec88fSEmmanuel Vadot #define TIM15_K 208 224c66ec88fSEmmanuel Vadot #define TIM16_K 209 225c66ec88fSEmmanuel Vadot #define TIM17_K 210 226c66ec88fSEmmanuel Vadot 227c66ec88fSEmmanuel Vadot /* MCO clocks */ 228c66ec88fSEmmanuel Vadot #define CK_MCO1 211 229c66ec88fSEmmanuel Vadot #define CK_MCO2 212 230c66ec88fSEmmanuel Vadot 231c66ec88fSEmmanuel Vadot /* TRACE & DEBUG clocks */ 232c66ec88fSEmmanuel Vadot #define CK_DBG 214 233c66ec88fSEmmanuel Vadot #define CK_TRACE 215 234c66ec88fSEmmanuel Vadot 235c66ec88fSEmmanuel Vadot /* DDR */ 236c66ec88fSEmmanuel Vadot #define DDRC1 220 237c66ec88fSEmmanuel Vadot #define DDRC1LP 221 238c66ec88fSEmmanuel Vadot #define DDRC2 222 239c66ec88fSEmmanuel Vadot #define DDRC2LP 223 240c66ec88fSEmmanuel Vadot #define DDRPHYC 224 241c66ec88fSEmmanuel Vadot #define DDRPHYCLP 225 242c66ec88fSEmmanuel Vadot #define DDRCAPB 226 243c66ec88fSEmmanuel Vadot #define DDRCAPBLP 227 244c66ec88fSEmmanuel Vadot #define AXIDCG 228 245c66ec88fSEmmanuel Vadot #define DDRPHYCAPB 229 246c66ec88fSEmmanuel Vadot #define DDRPHYCAPBLP 230 247c66ec88fSEmmanuel Vadot #define DDRPERFM 231 248c66ec88fSEmmanuel Vadot 249c66ec88fSEmmanuel Vadot #define STM32MP1_LAST_CLK 232 250c66ec88fSEmmanuel Vadot 2515956d97fSEmmanuel Vadot /* SCMI clock identifiers */ 252d5b0e70fSEmmanuel Vadot #define CK_SCMI_HSE 0 253d5b0e70fSEmmanuel Vadot #define CK_SCMI_HSI 1 254d5b0e70fSEmmanuel Vadot #define CK_SCMI_CSI 2 255d5b0e70fSEmmanuel Vadot #define CK_SCMI_LSE 3 256d5b0e70fSEmmanuel Vadot #define CK_SCMI_LSI 4 257d5b0e70fSEmmanuel Vadot #define CK_SCMI_PLL2_Q 5 258d5b0e70fSEmmanuel Vadot #define CK_SCMI_PLL2_R 6 259d5b0e70fSEmmanuel Vadot #define CK_SCMI_MPU 7 260d5b0e70fSEmmanuel Vadot #define CK_SCMI_AXI 8 261d5b0e70fSEmmanuel Vadot #define CK_SCMI_BSEC 9 262d5b0e70fSEmmanuel Vadot #define CK_SCMI_CRYP1 10 263d5b0e70fSEmmanuel Vadot #define CK_SCMI_GPIOZ 11 264d5b0e70fSEmmanuel Vadot #define CK_SCMI_HASH1 12 265d5b0e70fSEmmanuel Vadot #define CK_SCMI_I2C4 13 266d5b0e70fSEmmanuel Vadot #define CK_SCMI_I2C6 14 267d5b0e70fSEmmanuel Vadot #define CK_SCMI_IWDG1 15 268d5b0e70fSEmmanuel Vadot #define CK_SCMI_RNG1 16 269d5b0e70fSEmmanuel Vadot #define CK_SCMI_RTC 17 270d5b0e70fSEmmanuel Vadot #define CK_SCMI_RTCAPB 18 271d5b0e70fSEmmanuel Vadot #define CK_SCMI_SPI6 19 272d5b0e70fSEmmanuel Vadot #define CK_SCMI_USART1 20 2735956d97fSEmmanuel Vadot 274c66ec88fSEmmanuel Vadot #endif /* _DT_BINDINGS_STM32MP1_CLKS_H_ */ 275