1*c66ec88fSEmmanuel Vadot /* SPDX-License-Identifier: GPL-2.0 */ 2*c66ec88fSEmmanuel Vadot /* 3*c66ec88fSEmmanuel Vadot * This header provides constants clk index STMicroelectronics 4*c66ec88fSEmmanuel Vadot * STiH410 SoC. 5*c66ec88fSEmmanuel Vadot */ 6*c66ec88fSEmmanuel Vadot #ifndef _DT_BINDINGS_CLK_STIH410 7*c66ec88fSEmmanuel Vadot #define _DT_BINDINGS_CLK_STIH410 8*c66ec88fSEmmanuel Vadot 9*c66ec88fSEmmanuel Vadot #include "stih407-clks.h" 10*c66ec88fSEmmanuel Vadot 11*c66ec88fSEmmanuel Vadot /* STiH410 introduces new clock outputs compared to STiH407 */ 12*c66ec88fSEmmanuel Vadot 13*c66ec88fSEmmanuel Vadot /* CLOCKGEN C0 */ 14*c66ec88fSEmmanuel Vadot #define CLK_TX_ICN_HADES 32 15*c66ec88fSEmmanuel Vadot #define CLK_RX_ICN_HADES 33 16*c66ec88fSEmmanuel Vadot #define CLK_ICN_REG_16 34 17*c66ec88fSEmmanuel Vadot #define CLK_PP_HADES 35 18*c66ec88fSEmmanuel Vadot #define CLK_CLUST_HADES 36 19*c66ec88fSEmmanuel Vadot #define CLK_HWPE_HADES 37 20*c66ec88fSEmmanuel Vadot #define CLK_FC_HADES 38 21*c66ec88fSEmmanuel Vadot 22*c66ec88fSEmmanuel Vadot /* CLOCKGEN D0 */ 23*c66ec88fSEmmanuel Vadot #define CLK_PCMR10_MASTER 4 24*c66ec88fSEmmanuel Vadot #define CLK_USB2_PHY 5 25*c66ec88fSEmmanuel Vadot 26*c66ec88fSEmmanuel Vadot #endif 27