1*c66ec88fSEmmanuel Vadot /* SPDX-License-Identifier: GPL-2.0 */ 2*c66ec88fSEmmanuel Vadot /* 3*c66ec88fSEmmanuel Vadot * This header provides constants clk index STMicroelectronics 4*c66ec88fSEmmanuel Vadot * STiH407 SoC. 5*c66ec88fSEmmanuel Vadot */ 6*c66ec88fSEmmanuel Vadot #ifndef _DT_BINDINGS_CLK_STIH407 7*c66ec88fSEmmanuel Vadot #define _DT_BINDINGS_CLK_STIH407 8*c66ec88fSEmmanuel Vadot 9*c66ec88fSEmmanuel Vadot /* CLOCKGEN A0 */ 10*c66ec88fSEmmanuel Vadot #define CLK_IC_LMI0 0 11*c66ec88fSEmmanuel Vadot #define CLK_IC_LMI1 1 12*c66ec88fSEmmanuel Vadot 13*c66ec88fSEmmanuel Vadot /* CLOCKGEN C0 */ 14*c66ec88fSEmmanuel Vadot #define CLK_ICN_GPU 0 15*c66ec88fSEmmanuel Vadot #define CLK_FDMA 1 16*c66ec88fSEmmanuel Vadot #define CLK_NAND 2 17*c66ec88fSEmmanuel Vadot #define CLK_HVA 3 18*c66ec88fSEmmanuel Vadot #define CLK_PROC_STFE 4 19*c66ec88fSEmmanuel Vadot #define CLK_PROC_TP 5 20*c66ec88fSEmmanuel Vadot #define CLK_RX_ICN_DMU 6 21*c66ec88fSEmmanuel Vadot #define CLK_RX_ICN_DISP_0 6 22*c66ec88fSEmmanuel Vadot #define CLK_RX_ICN_DISP_1 6 23*c66ec88fSEmmanuel Vadot #define CLK_RX_ICN_HVA 7 24*c66ec88fSEmmanuel Vadot #define CLK_RX_ICN_TS 7 25*c66ec88fSEmmanuel Vadot #define CLK_ICN_CPU 8 26*c66ec88fSEmmanuel Vadot #define CLK_TX_ICN_DMU 9 27*c66ec88fSEmmanuel Vadot #define CLK_TX_ICN_HVA 9 28*c66ec88fSEmmanuel Vadot #define CLK_TX_ICN_TS 9 29*c66ec88fSEmmanuel Vadot #define CLK_ICN_COMPO 9 30*c66ec88fSEmmanuel Vadot #define CLK_MMC_0 10 31*c66ec88fSEmmanuel Vadot #define CLK_MMC_1 11 32*c66ec88fSEmmanuel Vadot #define CLK_JPEGDEC 12 33*c66ec88fSEmmanuel Vadot #define CLK_ICN_REG 13 34*c66ec88fSEmmanuel Vadot #define CLK_TRACE_A9 13 35*c66ec88fSEmmanuel Vadot #define CLK_PTI_STM 13 36*c66ec88fSEmmanuel Vadot #define CLK_EXT2F_A9 13 37*c66ec88fSEmmanuel Vadot #define CLK_IC_BDISP_0 14 38*c66ec88fSEmmanuel Vadot #define CLK_IC_BDISP_1 15 39*c66ec88fSEmmanuel Vadot #define CLK_PP_DMU 16 40*c66ec88fSEmmanuel Vadot #define CLK_VID_DMU 17 41*c66ec88fSEmmanuel Vadot #define CLK_DSS_LPC 18 42*c66ec88fSEmmanuel Vadot #define CLK_ST231_AUD_0 19 43*c66ec88fSEmmanuel Vadot #define CLK_ST231_GP_0 19 44*c66ec88fSEmmanuel Vadot #define CLK_ST231_GP_1 20 45*c66ec88fSEmmanuel Vadot #define CLK_ST231_DMU 21 46*c66ec88fSEmmanuel Vadot #define CLK_ICN_LMI 22 47*c66ec88fSEmmanuel Vadot #define CLK_TX_ICN_DISP_0 23 48*c66ec88fSEmmanuel Vadot #define CLK_TX_ICN_DISP_1 23 49*c66ec88fSEmmanuel Vadot #define CLK_ICN_SBC 24 50*c66ec88fSEmmanuel Vadot #define CLK_STFE_FRC2 25 51*c66ec88fSEmmanuel Vadot #define CLK_ETH_PHY 26 52*c66ec88fSEmmanuel Vadot #define CLK_ETH_REF_PHYCLK 27 53*c66ec88fSEmmanuel Vadot #define CLK_FLASH_PROMIP 28 54*c66ec88fSEmmanuel Vadot #define CLK_MAIN_DISP 29 55*c66ec88fSEmmanuel Vadot #define CLK_AUX_DISP 30 56*c66ec88fSEmmanuel Vadot #define CLK_COMPO_DVP 31 57*c66ec88fSEmmanuel Vadot 58*c66ec88fSEmmanuel Vadot /* CLOCKGEN D0 */ 59*c66ec88fSEmmanuel Vadot #define CLK_PCM_0 0 60*c66ec88fSEmmanuel Vadot #define CLK_PCM_1 1 61*c66ec88fSEmmanuel Vadot #define CLK_PCM_2 2 62*c66ec88fSEmmanuel Vadot #define CLK_SPDIFF 3 63*c66ec88fSEmmanuel Vadot 64*c66ec88fSEmmanuel Vadot /* CLOCKGEN D2 */ 65*c66ec88fSEmmanuel Vadot #define CLK_PIX_MAIN_DISP 0 66*c66ec88fSEmmanuel Vadot #define CLK_PIX_PIP 1 67*c66ec88fSEmmanuel Vadot #define CLK_PIX_GDP1 2 68*c66ec88fSEmmanuel Vadot #define CLK_PIX_GDP2 3 69*c66ec88fSEmmanuel Vadot #define CLK_PIX_GDP3 4 70*c66ec88fSEmmanuel Vadot #define CLK_PIX_GDP4 5 71*c66ec88fSEmmanuel Vadot #define CLK_PIX_AUX_DISP 6 72*c66ec88fSEmmanuel Vadot #define CLK_DENC 7 73*c66ec88fSEmmanuel Vadot #define CLK_PIX_HDDAC 8 74*c66ec88fSEmmanuel Vadot #define CLK_HDDAC 9 75*c66ec88fSEmmanuel Vadot #define CLK_SDDAC 10 76*c66ec88fSEmmanuel Vadot #define CLK_PIX_DVO 11 77*c66ec88fSEmmanuel Vadot #define CLK_DVO 12 78*c66ec88fSEmmanuel Vadot #define CLK_PIX_HDMI 13 79*c66ec88fSEmmanuel Vadot #define CLK_TMDS_HDMI 14 80*c66ec88fSEmmanuel Vadot #define CLK_REF_HDMIPHY 15 81*c66ec88fSEmmanuel Vadot 82*c66ec88fSEmmanuel Vadot /* CLOCKGEN D3 */ 83*c66ec88fSEmmanuel Vadot #define CLK_STFE_FRC1 0 84*c66ec88fSEmmanuel Vadot #define CLK_TSOUT_0 1 85*c66ec88fSEmmanuel Vadot #define CLK_TSOUT_1 2 86*c66ec88fSEmmanuel Vadot #define CLK_MCHI 3 87*c66ec88fSEmmanuel Vadot #define CLK_VSENS_COMPO 4 88*c66ec88fSEmmanuel Vadot #define CLK_FRC1_REMOTE 5 89*c66ec88fSEmmanuel Vadot #define CLK_LPC_0 6 90*c66ec88fSEmmanuel Vadot #define CLK_LPC_1 7 91*c66ec88fSEmmanuel Vadot #endif 92