1c66ec88fSEmmanuel Vadot /* SPDX-License-Identifier: (GPL-2.0 OR MIT) */ 2c66ec88fSEmmanuel Vadot /* 3c66ec88fSEmmanuel Vadot * Copyright (C) 2018-2019 SiFive, Inc. 4c66ec88fSEmmanuel Vadot * Wesley Terpstra 5c66ec88fSEmmanuel Vadot * Paul Walmsley 6c66ec88fSEmmanuel Vadot */ 7c66ec88fSEmmanuel Vadot 8c66ec88fSEmmanuel Vadot #ifndef __DT_BINDINGS_CLOCK_SIFIVE_FU540_PRCI_H 9c66ec88fSEmmanuel Vadot #define __DT_BINDINGS_CLOCK_SIFIVE_FU540_PRCI_H 10c66ec88fSEmmanuel Vadot 11c66ec88fSEmmanuel Vadot /* Clock indexes for use by Device Tree data and the PRCI driver */ 12c66ec88fSEmmanuel Vadot 13*c9ccf3a3SEmmanuel Vadot #define FU540_PRCI_CLK_COREPLL 0 14*c9ccf3a3SEmmanuel Vadot #define FU540_PRCI_CLK_DDRPLL 1 15*c9ccf3a3SEmmanuel Vadot #define FU540_PRCI_CLK_GEMGXLPLL 2 16*c9ccf3a3SEmmanuel Vadot #define FU540_PRCI_CLK_TLCLK 3 17c66ec88fSEmmanuel Vadot 18c66ec88fSEmmanuel Vadot #endif 19