1*c66ec88fSEmmanuel Vadot /* SPDX-License-Identifier: GPL-2.0-only */ 2*c66ec88fSEmmanuel Vadot /* 3*c66ec88fSEmmanuel Vadot * Copyright 2017 Texas Instruments, Inc. 4*c66ec88fSEmmanuel Vadot */ 5*c66ec88fSEmmanuel Vadot #ifndef __DT_BINDINGS_CLK_DM814_H 6*c66ec88fSEmmanuel Vadot #define __DT_BINDINGS_CLK_DM814_H 7*c66ec88fSEmmanuel Vadot 8*c66ec88fSEmmanuel Vadot #define DM814_CLKCTRL_OFFSET 0x0 9*c66ec88fSEmmanuel Vadot #define DM814_CLKCTRL_INDEX(offset) ((offset) - DM814_CLKCTRL_OFFSET) 10*c66ec88fSEmmanuel Vadot 11*c66ec88fSEmmanuel Vadot /* default clocks */ 12*c66ec88fSEmmanuel Vadot #define DM814_USB_OTG_HS_CLKCTRL DM814_CLKCTRL_INDEX(0x58) 13*c66ec88fSEmmanuel Vadot 14*c66ec88fSEmmanuel Vadot /* alwon clocks */ 15*c66ec88fSEmmanuel Vadot #define DM814_UART1_CLKCTRL DM814_CLKCTRL_INDEX(0x150) 16*c66ec88fSEmmanuel Vadot #define DM814_UART2_CLKCTRL DM814_CLKCTRL_INDEX(0x154) 17*c66ec88fSEmmanuel Vadot #define DM814_UART3_CLKCTRL DM814_CLKCTRL_INDEX(0x158) 18*c66ec88fSEmmanuel Vadot #define DM814_GPIO1_CLKCTRL DM814_CLKCTRL_INDEX(0x15c) 19*c66ec88fSEmmanuel Vadot #define DM814_GPIO2_CLKCTRL DM814_CLKCTRL_INDEX(0x160) 20*c66ec88fSEmmanuel Vadot #define DM814_I2C1_CLKCTRL DM814_CLKCTRL_INDEX(0x164) 21*c66ec88fSEmmanuel Vadot #define DM814_I2C2_CLKCTRL DM814_CLKCTRL_INDEX(0x168) 22*c66ec88fSEmmanuel Vadot #define DM814_WD_TIMER_CLKCTRL DM814_CLKCTRL_INDEX(0x18c) 23*c66ec88fSEmmanuel Vadot #define DM814_MCSPI1_CLKCTRL DM814_CLKCTRL_INDEX(0x190) 24*c66ec88fSEmmanuel Vadot #define DM814_GPMC_CLKCTRL DM814_CLKCTRL_INDEX(0x1d0) 25*c66ec88fSEmmanuel Vadot #define DM814_CPGMAC0_CLKCTRL DM814_CLKCTRL_INDEX(0x1d4) 26*c66ec88fSEmmanuel Vadot #define DM814_MPU_CLKCTRL DM814_CLKCTRL_INDEX(0x1dc) 27*c66ec88fSEmmanuel Vadot #define DM814_RTC_CLKCTRL DM814_CLKCTRL_INDEX(0x1f0) 28*c66ec88fSEmmanuel Vadot #define DM814_TPCC_CLKCTRL DM814_CLKCTRL_INDEX(0x1f4) 29*c66ec88fSEmmanuel Vadot #define DM814_TPTC0_CLKCTRL DM814_CLKCTRL_INDEX(0x1f8) 30*c66ec88fSEmmanuel Vadot #define DM814_TPTC1_CLKCTRL DM814_CLKCTRL_INDEX(0x1fc) 31*c66ec88fSEmmanuel Vadot #define DM814_TPTC2_CLKCTRL DM814_CLKCTRL_INDEX(0x200) 32*c66ec88fSEmmanuel Vadot #define DM814_TPTC3_CLKCTRL DM814_CLKCTRL_INDEX(0x204) 33*c66ec88fSEmmanuel Vadot #define DM814_MMC1_CLKCTRL DM814_CLKCTRL_INDEX(0x21c) 34*c66ec88fSEmmanuel Vadot #define DM814_MMC2_CLKCTRL DM814_CLKCTRL_INDEX(0x220) 35*c66ec88fSEmmanuel Vadot #define DM814_MMC3_CLKCTRL DM814_CLKCTRL_INDEX(0x224) 36*c66ec88fSEmmanuel Vadot 37*c66ec88fSEmmanuel Vadot /* alwon_ethernet clocks */ 38*c66ec88fSEmmanuel Vadot #define DM814_ETHERNET_CLKCTRL_OFFSET 0x1d4 39*c66ec88fSEmmanuel Vadot #define DM814_ETHERNET_CLKCTRL_INDEX(offset) ((offset) - DM814_ETHERNET_CLKCTRL_OFFSET) 40*c66ec88fSEmmanuel Vadot #define DM814_ETHERNET_CPGMAC0_CLKCTRL DM814_ETHERNET_CLKCTRL_INDEX(0x1d4) 41*c66ec88fSEmmanuel Vadot 42*c66ec88fSEmmanuel Vadot #endif 43