1*8d13bc63SEmmanuel Vadot# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2*8d13bc63SEmmanuel Vadot%YAML 1.2 3*8d13bc63SEmmanuel Vadot--- 4*8d13bc63SEmmanuel Vadot$id: http://devicetree.org/schemas/thermal/mediatek,thermal.yaml# 5*8d13bc63SEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml# 6*8d13bc63SEmmanuel Vadot 7*8d13bc63SEmmanuel Vadottitle: Mediatek thermal controller for on-SoC temperatures 8*8d13bc63SEmmanuel Vadot 9*8d13bc63SEmmanuel Vadotmaintainers: 10*8d13bc63SEmmanuel Vadot - Sascha Hauer <s.hauer@pengutronix.de> 11*8d13bc63SEmmanuel Vadot 12*8d13bc63SEmmanuel Vadotdescription: 13*8d13bc63SEmmanuel Vadot This device does not have its own ADC, instead it directly controls the AUXADC 14*8d13bc63SEmmanuel Vadot via AHB bus accesses. For this reason it needs phandles to the AUXADC. Also it 15*8d13bc63SEmmanuel Vadot controls a mux in the apmixedsys register space via AHB bus accesses, so a 16*8d13bc63SEmmanuel Vadot phandle to the APMIXEDSYS is also needed. 17*8d13bc63SEmmanuel Vadot 18*8d13bc63SEmmanuel VadotallOf: 19*8d13bc63SEmmanuel Vadot - $ref: thermal-sensor.yaml# 20*8d13bc63SEmmanuel Vadot 21*8d13bc63SEmmanuel Vadotproperties: 22*8d13bc63SEmmanuel Vadot compatible: 23*8d13bc63SEmmanuel Vadot enum: 24*8d13bc63SEmmanuel Vadot - mediatek,mt2701-thermal 25*8d13bc63SEmmanuel Vadot - mediatek,mt2712-thermal 26*8d13bc63SEmmanuel Vadot - mediatek,mt7622-thermal 27*8d13bc63SEmmanuel Vadot - mediatek,mt7981-thermal 28*8d13bc63SEmmanuel Vadot - mediatek,mt7986-thermal 29*8d13bc63SEmmanuel Vadot - mediatek,mt8173-thermal 30*8d13bc63SEmmanuel Vadot - mediatek,mt8183-thermal 31*8d13bc63SEmmanuel Vadot - mediatek,mt8365-thermal 32*8d13bc63SEmmanuel Vadot - mediatek,mt8516-thermal 33*8d13bc63SEmmanuel Vadot 34*8d13bc63SEmmanuel Vadot reg: 35*8d13bc63SEmmanuel Vadot maxItems: 1 36*8d13bc63SEmmanuel Vadot 37*8d13bc63SEmmanuel Vadot interrupts: 38*8d13bc63SEmmanuel Vadot maxItems: 1 39*8d13bc63SEmmanuel Vadot 40*8d13bc63SEmmanuel Vadot clocks: 41*8d13bc63SEmmanuel Vadot items: 42*8d13bc63SEmmanuel Vadot - description: Main clock needed for register access 43*8d13bc63SEmmanuel Vadot - description: The AUXADC clock 44*8d13bc63SEmmanuel Vadot 45*8d13bc63SEmmanuel Vadot clock-names: 46*8d13bc63SEmmanuel Vadot items: 47*8d13bc63SEmmanuel Vadot - const: therm 48*8d13bc63SEmmanuel Vadot - const: auxadc 49*8d13bc63SEmmanuel Vadot 50*8d13bc63SEmmanuel Vadot mediatek,auxadc: 51*8d13bc63SEmmanuel Vadot $ref: /schemas/types.yaml#/definitions/phandle 52*8d13bc63SEmmanuel Vadot description: A phandle to the AUXADC which the thermal controller uses 53*8d13bc63SEmmanuel Vadot 54*8d13bc63SEmmanuel Vadot mediatek,apmixedsys: 55*8d13bc63SEmmanuel Vadot $ref: /schemas/types.yaml#/definitions/phandle 56*8d13bc63SEmmanuel Vadot description: A phandle to the APMIXEDSYS controller 57*8d13bc63SEmmanuel Vadot 58*8d13bc63SEmmanuel Vadot resets: 59*8d13bc63SEmmanuel Vadot description: Reset controller controlling the thermal controller 60*8d13bc63SEmmanuel Vadot 61*8d13bc63SEmmanuel Vadot nvmem-cells: 62*8d13bc63SEmmanuel Vadot items: 63*8d13bc63SEmmanuel Vadot - description: 64*8d13bc63SEmmanuel Vadot NVMEM cell with EEPROMA phandle to the calibration data provided by an 65*8d13bc63SEmmanuel Vadot NVMEM device. If unspecified default values shall be used. 66*8d13bc63SEmmanuel Vadot 67*8d13bc63SEmmanuel Vadot nvmem-cell-names: 68*8d13bc63SEmmanuel Vadot items: 69*8d13bc63SEmmanuel Vadot - const: calibration-data 70*8d13bc63SEmmanuel Vadot 71*8d13bc63SEmmanuel Vadotrequired: 72*8d13bc63SEmmanuel Vadot - reg 73*8d13bc63SEmmanuel Vadot - interrupts 74*8d13bc63SEmmanuel Vadot - clocks 75*8d13bc63SEmmanuel Vadot - clock-names 76*8d13bc63SEmmanuel Vadot - mediatek,auxadc 77*8d13bc63SEmmanuel Vadot - mediatek,apmixedsys 78*8d13bc63SEmmanuel Vadot 79*8d13bc63SEmmanuel VadotunevaluatedProperties: false 80*8d13bc63SEmmanuel Vadot 81*8d13bc63SEmmanuel Vadotexamples: 82*8d13bc63SEmmanuel Vadot - | 83*8d13bc63SEmmanuel Vadot #include <dt-bindings/interrupt-controller/irq.h> 84*8d13bc63SEmmanuel Vadot #include <dt-bindings/clock/mt8173-clk.h> 85*8d13bc63SEmmanuel Vadot #include <dt-bindings/reset/mt8173-resets.h> 86*8d13bc63SEmmanuel Vadot 87*8d13bc63SEmmanuel Vadot thermal@1100b000 { 88*8d13bc63SEmmanuel Vadot compatible = "mediatek,mt8173-thermal"; 89*8d13bc63SEmmanuel Vadot reg = <0x1100b000 0x1000>; 90*8d13bc63SEmmanuel Vadot interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>; 91*8d13bc63SEmmanuel Vadot clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>; 92*8d13bc63SEmmanuel Vadot clock-names = "therm", "auxadc"; 93*8d13bc63SEmmanuel Vadot resets = <&pericfg MT8173_PERI_THERM_SW_RST>; 94*8d13bc63SEmmanuel Vadot mediatek,auxadc = <&auxadc>; 95*8d13bc63SEmmanuel Vadot mediatek,apmixedsys = <&apmixedsys>; 96*8d13bc63SEmmanuel Vadot nvmem-cells = <&thermal_calibration_data>; 97*8d13bc63SEmmanuel Vadot nvmem-cell-names = "calibration-data"; 98*8d13bc63SEmmanuel Vadot #thermal-sensor-cells = <1>; 99*8d13bc63SEmmanuel Vadot }; 100