1*c66ec88fSEmmanuel VadotXilinx Zynq UltraScale+ MPSoC GQSPI controller Device Tree Bindings 2*c66ec88fSEmmanuel Vadot------------------------------------------------------------------- 3*c66ec88fSEmmanuel Vadot 4*c66ec88fSEmmanuel VadotRequired properties: 5*c66ec88fSEmmanuel Vadot- compatible : Should be "xlnx,zynqmp-qspi-1.0". 6*c66ec88fSEmmanuel Vadot- reg : Physical base address and size of GQSPI registers map. 7*c66ec88fSEmmanuel Vadot- interrupts : Property with a value describing the interrupt 8*c66ec88fSEmmanuel Vadot number. 9*c66ec88fSEmmanuel Vadot- clock-names : List of input clock names - "ref_clk", "pclk" 10*c66ec88fSEmmanuel Vadot (See clock bindings for details). 11*c66ec88fSEmmanuel Vadot- clocks : Clock phandles (see clock bindings for details). 12*c66ec88fSEmmanuel Vadot 13*c66ec88fSEmmanuel VadotOptional properties: 14*c66ec88fSEmmanuel Vadot- num-cs : Number of chip selects used. 15*c66ec88fSEmmanuel Vadot 16*c66ec88fSEmmanuel VadotExample: 17*c66ec88fSEmmanuel Vadot qspi: spi@ff0f0000 { 18*c66ec88fSEmmanuel Vadot compatible = "xlnx,zynqmp-qspi-1.0"; 19*c66ec88fSEmmanuel Vadot clock-names = "ref_clk", "pclk"; 20*c66ec88fSEmmanuel Vadot clocks = <&misc_clk &misc_clk>; 21*c66ec88fSEmmanuel Vadot interrupts = <0 15 4>; 22*c66ec88fSEmmanuel Vadot interrupt-parent = <&gic>; 23*c66ec88fSEmmanuel Vadot num-cs = <1>; 24*c66ec88fSEmmanuel Vadot reg = <0x0 0xff0f0000 0x1000>,<0x0 0xc0000000 0x8000000>; 25*c66ec88fSEmmanuel Vadot }; 26