1*c66ec88fSEmmanuel Vadot* Freescale Quad Serial Peripheral Interface(QuadSPI) 2*c66ec88fSEmmanuel Vadot 3*c66ec88fSEmmanuel VadotRequired properties: 4*c66ec88fSEmmanuel Vadot - compatible : Should be "fsl,vf610-qspi", "fsl,imx6sx-qspi", 5*c66ec88fSEmmanuel Vadot "fsl,imx7d-qspi", "fsl,imx6ul-qspi", 6*c66ec88fSEmmanuel Vadot "fsl,ls1021a-qspi", "fsl,ls2080a-qspi" 7*c66ec88fSEmmanuel Vadot or 8*c66ec88fSEmmanuel Vadot "fsl,ls1043a-qspi" followed by "fsl,ls1021a-qspi" 9*c66ec88fSEmmanuel Vadot - reg : the first contains the register location and length, 10*c66ec88fSEmmanuel Vadot the second contains the memory mapping address and length 11*c66ec88fSEmmanuel Vadot - reg-names: Should contain the reg names "QuadSPI" and "QuadSPI-memory" 12*c66ec88fSEmmanuel Vadot - interrupts : Should contain the interrupt for the device 13*c66ec88fSEmmanuel Vadot - clocks : The clocks needed by the QuadSPI controller 14*c66ec88fSEmmanuel Vadot - clock-names : Should contain the name of the clocks: "qspi_en" and "qspi". 15*c66ec88fSEmmanuel Vadot 16*c66ec88fSEmmanuel VadotRequired SPI slave node properties: 17*c66ec88fSEmmanuel Vadot - reg: There are two buses (A and B) with two chip selects each. 18*c66ec88fSEmmanuel Vadot This encodes to which bus and CS the flash is connected: 19*c66ec88fSEmmanuel Vadot <0>: Bus A, CS 0 20*c66ec88fSEmmanuel Vadot <1>: Bus A, CS 1 21*c66ec88fSEmmanuel Vadot <2>: Bus B, CS 0 22*c66ec88fSEmmanuel Vadot <3>: Bus B, CS 1 23*c66ec88fSEmmanuel Vadot 24*c66ec88fSEmmanuel VadotExample: 25*c66ec88fSEmmanuel Vadot 26*c66ec88fSEmmanuel Vadotqspi0: quadspi@40044000 { 27*c66ec88fSEmmanuel Vadot compatible = "fsl,vf610-qspi"; 28*c66ec88fSEmmanuel Vadot reg = <0x40044000 0x1000>, <0x20000000 0x10000000>; 29*c66ec88fSEmmanuel Vadot reg-names = "QuadSPI", "QuadSPI-memory"; 30*c66ec88fSEmmanuel Vadot interrupts = <0 24 IRQ_TYPE_LEVEL_HIGH>; 31*c66ec88fSEmmanuel Vadot clocks = <&clks VF610_CLK_QSPI0_EN>, 32*c66ec88fSEmmanuel Vadot <&clks VF610_CLK_QSPI0>; 33*c66ec88fSEmmanuel Vadot clock-names = "qspi_en", "qspi"; 34*c66ec88fSEmmanuel Vadot 35*c66ec88fSEmmanuel Vadot flash0: s25fl128s@0 { 36*c66ec88fSEmmanuel Vadot #address-cells = <1>; 37*c66ec88fSEmmanuel Vadot #size-cells = <1>; 38*c66ec88fSEmmanuel Vadot compatible = "spansion,s25fl128s", "jedec,spi-nor"; 39*c66ec88fSEmmanuel Vadot spi-max-frequency = <50000000>; 40*c66ec88fSEmmanuel Vadot reg = <0>; 41*c66ec88fSEmmanuel Vadot }; 42*c66ec88fSEmmanuel Vadot}; 43*c66ec88fSEmmanuel Vadot 44*c66ec88fSEmmanuel VadotExample showing the usage of two SPI NOR devices on bus A: 45*c66ec88fSEmmanuel Vadot 46*c66ec88fSEmmanuel Vadot&qspi2 { 47*c66ec88fSEmmanuel Vadot pinctrl-names = "default"; 48*c66ec88fSEmmanuel Vadot pinctrl-0 = <&pinctrl_qspi2>; 49*c66ec88fSEmmanuel Vadot status = "okay"; 50*c66ec88fSEmmanuel Vadot 51*c66ec88fSEmmanuel Vadot flash0: n25q256a@0 { 52*c66ec88fSEmmanuel Vadot #address-cells = <1>; 53*c66ec88fSEmmanuel Vadot #size-cells = <1>; 54*c66ec88fSEmmanuel Vadot compatible = "micron,n25q256a", "jedec,spi-nor"; 55*c66ec88fSEmmanuel Vadot spi-max-frequency = <29000000>; 56*c66ec88fSEmmanuel Vadot reg = <0>; 57*c66ec88fSEmmanuel Vadot }; 58*c66ec88fSEmmanuel Vadot 59*c66ec88fSEmmanuel Vadot flash1: n25q256a@1 { 60*c66ec88fSEmmanuel Vadot #address-cells = <1>; 61*c66ec88fSEmmanuel Vadot #size-cells = <1>; 62*c66ec88fSEmmanuel Vadot compatible = "micron,n25q256a", "jedec,spi-nor"; 63*c66ec88fSEmmanuel Vadot spi-max-frequency = <29000000>; 64*c66ec88fSEmmanuel Vadot reg = <1>; 65*c66ec88fSEmmanuel Vadot }; 66*c66ec88fSEmmanuel Vadot}; 67