xref: /freebsd-src/sys/contrib/device-tree/Bindings/soc/imx/fsl,imx8mq-vpu-blk-ctrl.yaml (revision fac71e4e09885bb2afa3d984a0c239a52e1a7418)
1c9ccf3a3SEmmanuel Vadot# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2c9ccf3a3SEmmanuel Vadot%YAML 1.2
3c9ccf3a3SEmmanuel Vadot---
4c9ccf3a3SEmmanuel Vadot$id: http://devicetree.org/schemas/soc/imx/fsl,imx8mq-vpu-blk-ctrl.yaml#
5c9ccf3a3SEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml#
6c9ccf3a3SEmmanuel Vadot
7c9ccf3a3SEmmanuel Vadottitle: NXP i.MX8MQ VPU blk-ctrl
8c9ccf3a3SEmmanuel Vadot
9c9ccf3a3SEmmanuel Vadotmaintainers:
10c9ccf3a3SEmmanuel Vadot  - Lucas Stach <l.stach@pengutronix.de>
11c9ccf3a3SEmmanuel Vadot
12c9ccf3a3SEmmanuel Vadotdescription:
13c9ccf3a3SEmmanuel Vadot  The i.MX8MQ VPU blk-ctrl is a top-level peripheral providing access to
14c9ccf3a3SEmmanuel Vadot  the NoC and ensuring proper power sequencing of the VPU peripherals
15c9ccf3a3SEmmanuel Vadot  located in the VPU domain of the SoC.
16c9ccf3a3SEmmanuel Vadot
17c9ccf3a3SEmmanuel Vadotproperties:
18c9ccf3a3SEmmanuel Vadot  compatible:
19c9ccf3a3SEmmanuel Vadot    items:
20c9ccf3a3SEmmanuel Vadot      - const: fsl,imx8mq-vpu-blk-ctrl
21c9ccf3a3SEmmanuel Vadot
22c9ccf3a3SEmmanuel Vadot  reg:
23c9ccf3a3SEmmanuel Vadot    maxItems: 1
24c9ccf3a3SEmmanuel Vadot
25c9ccf3a3SEmmanuel Vadot  '#power-domain-cells':
26c9ccf3a3SEmmanuel Vadot    const: 1
27c9ccf3a3SEmmanuel Vadot
28c9ccf3a3SEmmanuel Vadot  power-domains:
29c9ccf3a3SEmmanuel Vadot    minItems: 3
30c9ccf3a3SEmmanuel Vadot    maxItems: 3
31c9ccf3a3SEmmanuel Vadot
32c9ccf3a3SEmmanuel Vadot  power-domain-names:
33c9ccf3a3SEmmanuel Vadot    items:
34c9ccf3a3SEmmanuel Vadot      - const: bus
35c9ccf3a3SEmmanuel Vadot      - const: g1
36c9ccf3a3SEmmanuel Vadot      - const: g2
37c9ccf3a3SEmmanuel Vadot
38c9ccf3a3SEmmanuel Vadot  clocks:
39c9ccf3a3SEmmanuel Vadot    minItems: 2
40c9ccf3a3SEmmanuel Vadot    maxItems: 2
41c9ccf3a3SEmmanuel Vadot
42c9ccf3a3SEmmanuel Vadot  clock-names:
43c9ccf3a3SEmmanuel Vadot    items:
44c9ccf3a3SEmmanuel Vadot      - const: g1
45c9ccf3a3SEmmanuel Vadot      - const: g2
46c9ccf3a3SEmmanuel Vadot
47c9ccf3a3SEmmanuel Vadotrequired:
48c9ccf3a3SEmmanuel Vadot  - compatible
49c9ccf3a3SEmmanuel Vadot  - reg
50c9ccf3a3SEmmanuel Vadot  - power-domains
51c9ccf3a3SEmmanuel Vadot  - power-domain-names
52c9ccf3a3SEmmanuel Vadot  - clocks
53c9ccf3a3SEmmanuel Vadot  - clock-names
54c9ccf3a3SEmmanuel Vadot
55c9ccf3a3SEmmanuel VadotadditionalProperties: false
56c9ccf3a3SEmmanuel Vadot
57c9ccf3a3SEmmanuel Vadotexamples:
58c9ccf3a3SEmmanuel Vadot  - |
59c9ccf3a3SEmmanuel Vadot    #include <dt-bindings/clock/imx8mq-clock.h>
60c9ccf3a3SEmmanuel Vadot    #include <dt-bindings/power/imx8mq-power.h>
61c9ccf3a3SEmmanuel Vadot
62*fac71e4eSEmmanuel Vadot    blk-ctrl@38320000 {
63c9ccf3a3SEmmanuel Vadot      compatible = "fsl,imx8mq-vpu-blk-ctrl";
64c9ccf3a3SEmmanuel Vadot      reg = <0x38320000 0x100>;
65c9ccf3a3SEmmanuel Vadot      power-domains = <&pgc_vpu>, <&pgc_vpu>, <&pgc_vpu>;
66c9ccf3a3SEmmanuel Vadot      power-domain-names = "bus", "g1", "g2";
67c9ccf3a3SEmmanuel Vadot      clocks = <&clk IMX8MQ_CLK_VPU_G1_ROOT>,
68c9ccf3a3SEmmanuel Vadot               <&clk IMX8MQ_CLK_VPU_G2_ROOT>;
69c9ccf3a3SEmmanuel Vadot      clock-names = "g1", "g2";
70c9ccf3a3SEmmanuel Vadot      #power-domain-cells = <1>;
71c9ccf3a3SEmmanuel Vadot    };
72