1*c66ec88fSEmmanuel VadotTrusted Computing Group MMIO Trusted Platform Module 2*c66ec88fSEmmanuel Vadot 3*c66ec88fSEmmanuel VadotThe TCG defines multi vendor standard for accessing a TPM chip, this 4*c66ec88fSEmmanuel Vadotis the standard protocol defined to access the TPM via MMIO. Typically 5*c66ec88fSEmmanuel Vadotthis interface will be implemented over Intel's LPC bus. 6*c66ec88fSEmmanuel Vadot 7*c66ec88fSEmmanuel VadotRefer to the 'TCG PC Client Specific TPM Interface Specification (TIS)' TCG 8*c66ec88fSEmmanuel Vadotpublication for the specification. 9*c66ec88fSEmmanuel Vadot 10*c66ec88fSEmmanuel VadotRequired properties: 11*c66ec88fSEmmanuel Vadot 12*c66ec88fSEmmanuel Vadot- compatible: should contain a string below for the chip, followed by 13*c66ec88fSEmmanuel Vadot "tcg,tpm-tis-mmio". Valid chip strings are: 14*c66ec88fSEmmanuel Vadot * "atmel,at97sc3204" 15*c66ec88fSEmmanuel Vadot- reg: The location of the MMIO registers, should be at least 0x5000 bytes 16*c66ec88fSEmmanuel Vadot- interrupts: An optional interrupt indicating command completion. 17*c66ec88fSEmmanuel Vadot 18*c66ec88fSEmmanuel VadotExample: 19*c66ec88fSEmmanuel Vadot 20*c66ec88fSEmmanuel Vadot tpm_tis@90000 { 21*c66ec88fSEmmanuel Vadot compatible = "atmel,at97sc3204", "tcg,tpm-tis-mmio"; 22*c66ec88fSEmmanuel Vadot reg = <0x90000 0x5000>; 23*c66ec88fSEmmanuel Vadot interrupt-parent = <&EIC0>; 24*c66ec88fSEmmanuel Vadot interrupts = <1 2>; 25*c66ec88fSEmmanuel Vadot }; 26