1c66ec88fSEmmanuel VadotMediaTek PWM controller 2c66ec88fSEmmanuel Vadot 3c66ec88fSEmmanuel VadotRequired properties: 4c66ec88fSEmmanuel Vadot - compatible: should be "mediatek,<name>-pwm": 5c66ec88fSEmmanuel Vadot - "mediatek,mt2712-pwm": found on mt2712 SoC. 6d5b0e70fSEmmanuel Vadot - "mediatek,mt6795-pwm": found on mt6795 SoC. 7c66ec88fSEmmanuel Vadot - "mediatek,mt7622-pwm": found on mt7622 SoC. 8c66ec88fSEmmanuel Vadot - "mediatek,mt7623-pwm": found on mt7623 SoC. 9c66ec88fSEmmanuel Vadot - "mediatek,mt7628-pwm": found on mt7628 SoC. 10c66ec88fSEmmanuel Vadot - "mediatek,mt7629-pwm": found on mt7629 SoC. 115def4c47SEmmanuel Vadot - "mediatek,mt8183-pwm": found on mt8183 SoC. 12*b97ee269SEmmanuel Vadot - "mediatek,mt8195-pwm", "mediatek,mt8183-pwm": found on mt8195 SoC. 13*b97ee269SEmmanuel Vadot - "mediatek,mt8365-pwm": found on mt8365 SoC. 14c66ec88fSEmmanuel Vadot - "mediatek,mt8516-pwm": found on mt8516 SoC. 15c66ec88fSEmmanuel Vadot - reg: physical base address and length of the controller's registers. 16c66ec88fSEmmanuel Vadot - #pwm-cells: must be 2. See pwm.yaml in this directory for a description of 17c66ec88fSEmmanuel Vadot the cell format. 18c66ec88fSEmmanuel Vadot - clocks: phandle and clock specifier of the PWM reference clock. 19c66ec88fSEmmanuel Vadot - clock-names: must contain the following, except for MT7628 which 20c66ec88fSEmmanuel Vadot has no clocks 21c66ec88fSEmmanuel Vadot - "top": the top clock generator 22c66ec88fSEmmanuel Vadot - "main": clock used by the PWM core 23*b97ee269SEmmanuel Vadot - "pwm1-3": the three per PWM clocks for mt8365 24c66ec88fSEmmanuel Vadot - "pwm1-8": the eight per PWM clocks for mt2712 25c66ec88fSEmmanuel Vadot - "pwm1-6": the six per PWM clocks for mt7622 26c66ec88fSEmmanuel Vadot - "pwm1-5": the five per PWM clocks for mt7623 27c66ec88fSEmmanuel Vadot - "pwm1" : the PWM1 clock for mt7629 28c66ec88fSEmmanuel Vadot - pinctrl-names: Must contain a "default" entry. 29c66ec88fSEmmanuel Vadot - pinctrl-0: One property must exist for each entry in pinctrl-names. 30c66ec88fSEmmanuel Vadot See pinctrl/pinctrl-bindings.txt for details of the property values. 31c66ec88fSEmmanuel Vadot 32c66ec88fSEmmanuel VadotOptional properties: 33c66ec88fSEmmanuel Vadot- assigned-clocks: Reference to the PWM clock entries. 34c66ec88fSEmmanuel Vadot- assigned-clock-parents: The phandle of the parent clock of PWM clock. 35c66ec88fSEmmanuel Vadot 36c66ec88fSEmmanuel VadotExample: 37c66ec88fSEmmanuel Vadot pwm0: pwm@11006000 { 38c66ec88fSEmmanuel Vadot compatible = "mediatek,mt7623-pwm"; 39c66ec88fSEmmanuel Vadot reg = <0 0x11006000 0 0x1000>; 40c66ec88fSEmmanuel Vadot #pwm-cells = <2>; 41c66ec88fSEmmanuel Vadot clocks = <&topckgen CLK_TOP_PWM_SEL>, 42c66ec88fSEmmanuel Vadot <&pericfg CLK_PERI_PWM>, 43c66ec88fSEmmanuel Vadot <&pericfg CLK_PERI_PWM1>, 44c66ec88fSEmmanuel Vadot <&pericfg CLK_PERI_PWM2>, 45c66ec88fSEmmanuel Vadot <&pericfg CLK_PERI_PWM3>, 46c66ec88fSEmmanuel Vadot <&pericfg CLK_PERI_PWM4>, 47c66ec88fSEmmanuel Vadot <&pericfg CLK_PERI_PWM5>; 48c66ec88fSEmmanuel Vadot clock-names = "top", "main", "pwm1", "pwm2", 49c66ec88fSEmmanuel Vadot "pwm3", "pwm4", "pwm5"; 50c66ec88fSEmmanuel Vadot pinctrl-names = "default"; 51c66ec88fSEmmanuel Vadot pinctrl-0 = <&pwm0_pins>; 52c66ec88fSEmmanuel Vadot }; 53