1c66ec88fSEmmanuel VadotMicrosemi Ocelot reset controller 2c66ec88fSEmmanuel Vadot 3c66ec88fSEmmanuel VadotThe DEVCPU_GCB:CHIP_REGS have a SOFT_RST register that can be used to reset the 46be33864SEmmanuel VadotSoC core. 56be33864SEmmanuel Vadot 66be33864SEmmanuel VadotThe reset registers are both present in the MSCC vcoreiii MIPS and 76be33864SEmmanuel Vadotmicrochip Sparx5 armv8 SoC's. 8c66ec88fSEmmanuel Vadot 9c66ec88fSEmmanuel VadotRequired Properties: 10*5def4c47SEmmanuel Vadot 11*5def4c47SEmmanuel Vadot - compatible: "mscc,ocelot-chip-reset", "mscc,luton-chip-reset", 12*5def4c47SEmmanuel Vadot "mscc,jaguar2-chip-reset" or "microchip,sparx5-chip-reset" 13c66ec88fSEmmanuel Vadot 14c66ec88fSEmmanuel VadotExample: 15c66ec88fSEmmanuel Vadot reset@1070008 { 16c66ec88fSEmmanuel Vadot compatible = "mscc,ocelot-chip-reset"; 17c66ec88fSEmmanuel Vadot reg = <0x1070008 0x4>; 18c66ec88fSEmmanuel Vadot }; 19c66ec88fSEmmanuel Vadot 20