1*8bab661aSEmmanuel Vadot# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*8bab661aSEmmanuel Vadot%YAML 1.2 3*8bab661aSEmmanuel Vadot--- 4*8bab661aSEmmanuel Vadot$id: http://devicetree.org/schemas/perf/amlogic,g12-ddr-pmu.yaml# 5*8bab661aSEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml# 6*8bab661aSEmmanuel Vadot 7*8bab661aSEmmanuel Vadottitle: Amlogic G12 DDR performance monitor 8*8bab661aSEmmanuel Vadot 9*8bab661aSEmmanuel Vadotmaintainers: 10*8bab661aSEmmanuel Vadot - Jiucheng Xu <jiucheng.xu@amlogic.com> 11*8bab661aSEmmanuel Vadot 12*8bab661aSEmmanuel Vadotdescription: | 13*8bab661aSEmmanuel Vadot Amlogic G12 series SoC integrate DDR bandwidth monitor. 14*8bab661aSEmmanuel Vadot A timer is inside and can generate interrupt when timeout. 15*8bab661aSEmmanuel Vadot The bandwidth is counted in the timer ISR. Different platform 16*8bab661aSEmmanuel Vadot has different subset of event format attribute. 17*8bab661aSEmmanuel Vadot 18*8bab661aSEmmanuel Vadotproperties: 19*8bab661aSEmmanuel Vadot compatible: 20*8bab661aSEmmanuel Vadot enum: 21*8bab661aSEmmanuel Vadot - amlogic,g12a-ddr-pmu 22*8bab661aSEmmanuel Vadot - amlogic,g12b-ddr-pmu 23*8bab661aSEmmanuel Vadot - amlogic,sm1-ddr-pmu 24*8bab661aSEmmanuel Vadot 25*8bab661aSEmmanuel Vadot reg: 26*8bab661aSEmmanuel Vadot items: 27*8bab661aSEmmanuel Vadot - description: DMC bandwidth register space. 28*8bab661aSEmmanuel Vadot - description: DMC PLL register space. 29*8bab661aSEmmanuel Vadot 30*8bab661aSEmmanuel Vadot interrupts: 31*8bab661aSEmmanuel Vadot items: 32*8bab661aSEmmanuel Vadot - description: The IRQ of the inside timer timeout. 33*8bab661aSEmmanuel Vadot 34*8bab661aSEmmanuel Vadotrequired: 35*8bab661aSEmmanuel Vadot - compatible 36*8bab661aSEmmanuel Vadot - reg 37*8bab661aSEmmanuel Vadot - interrupts 38*8bab661aSEmmanuel Vadot 39*8bab661aSEmmanuel VadotadditionalProperties: false 40*8bab661aSEmmanuel Vadot 41*8bab661aSEmmanuel Vadotexamples: 42*8bab661aSEmmanuel Vadot - | 43*8bab661aSEmmanuel Vadot #include <dt-bindings/interrupt-controller/arm-gic.h> 44*8bab661aSEmmanuel Vadot pmu { 45*8bab661aSEmmanuel Vadot #address-cells = <2>; 46*8bab661aSEmmanuel Vadot #size-cells = <2>; 47*8bab661aSEmmanuel Vadot 48*8bab661aSEmmanuel Vadot pmu@ff638000 { 49*8bab661aSEmmanuel Vadot compatible = "amlogic,g12a-ddr-pmu"; 50*8bab661aSEmmanuel Vadot reg = <0x0 0xff638000 0x0 0x100>, 51*8bab661aSEmmanuel Vadot <0x0 0xff638c00 0x0 0x100>; 52*8bab661aSEmmanuel Vadot interrupts = <GIC_SPI 52 IRQ_TYPE_EDGE_RISING>; 53*8bab661aSEmmanuel Vadot }; 54*8bab661aSEmmanuel Vadot }; 55