xref: /freebsd-src/sys/contrib/device-tree/Bindings/pci/pci-msi.txt (revision c66ec88fed842fbaad62c30d510644ceb7bd2d71)
1*c66ec88fSEmmanuel VadotThis document describes the generic device tree binding for describing the
2*c66ec88fSEmmanuel Vadotrelationship between PCI devices and MSI controllers.
3*c66ec88fSEmmanuel Vadot
4*c66ec88fSEmmanuel VadotEach PCI device under a root complex is uniquely identified by its Requester ID
5*c66ec88fSEmmanuel Vadot(AKA RID). A Requester ID is a triplet of a Bus number, Device number, and
6*c66ec88fSEmmanuel VadotFunction number.
7*c66ec88fSEmmanuel Vadot
8*c66ec88fSEmmanuel VadotFor the purpose of this document, when treated as a numeric value, a RID is
9*c66ec88fSEmmanuel Vadotformatted such that:
10*c66ec88fSEmmanuel Vadot
11*c66ec88fSEmmanuel Vadot* Bits [15:8] are the Bus number.
12*c66ec88fSEmmanuel Vadot* Bits [7:3] are the Device number.
13*c66ec88fSEmmanuel Vadot* Bits [2:0] are the Function number.
14*c66ec88fSEmmanuel Vadot* Any other bits required for padding must be zero.
15*c66ec88fSEmmanuel Vadot
16*c66ec88fSEmmanuel VadotMSIs may be distinguished in part through the use of sideband data accompanying
17*c66ec88fSEmmanuel Vadotwrites. In the case of PCI devices, this sideband data may be derived from the
18*c66ec88fSEmmanuel VadotRequester ID. A mechanism is required to associate a device with both the MSI
19*c66ec88fSEmmanuel Vadotcontrollers it can address, and the sideband data that will be associated with
20*c66ec88fSEmmanuel Vadotits writes to those controllers.
21*c66ec88fSEmmanuel Vadot
22*c66ec88fSEmmanuel VadotFor generic MSI bindings, see
23*c66ec88fSEmmanuel VadotDocumentation/devicetree/bindings/interrupt-controller/msi.txt.
24*c66ec88fSEmmanuel Vadot
25*c66ec88fSEmmanuel Vadot
26*c66ec88fSEmmanuel VadotPCI root complex
27*c66ec88fSEmmanuel Vadot================
28*c66ec88fSEmmanuel Vadot
29*c66ec88fSEmmanuel VadotOptional properties
30*c66ec88fSEmmanuel Vadot-------------------
31*c66ec88fSEmmanuel Vadot
32*c66ec88fSEmmanuel Vadot- msi-map: Maps a Requester ID to an MSI controller and associated
33*c66ec88fSEmmanuel Vadot  msi-specifier data. The property is an arbitrary number of tuples of
34*c66ec88fSEmmanuel Vadot  (rid-base,msi-controller,msi-base,length), where:
35*c66ec88fSEmmanuel Vadot
36*c66ec88fSEmmanuel Vadot  * rid-base is a single cell describing the first RID matched by the entry.
37*c66ec88fSEmmanuel Vadot
38*c66ec88fSEmmanuel Vadot  * msi-controller is a single phandle to an MSI controller
39*c66ec88fSEmmanuel Vadot
40*c66ec88fSEmmanuel Vadot  * msi-base is an msi-specifier describing the msi-specifier produced for the
41*c66ec88fSEmmanuel Vadot    first RID matched by the entry.
42*c66ec88fSEmmanuel Vadot
43*c66ec88fSEmmanuel Vadot  * length is a single cell describing how many consecutive RIDs are matched
44*c66ec88fSEmmanuel Vadot    following the rid-base.
45*c66ec88fSEmmanuel Vadot
46*c66ec88fSEmmanuel Vadot  Any RID r in the interval [rid-base, rid-base + length) is associated with
47*c66ec88fSEmmanuel Vadot  the listed msi-controller, with the msi-specifier (r - rid-base + msi-base).
48*c66ec88fSEmmanuel Vadot
49*c66ec88fSEmmanuel Vadot- msi-map-mask: A mask to be applied to each Requester ID prior to being mapped
50*c66ec88fSEmmanuel Vadot  to an msi-specifier per the msi-map property.
51*c66ec88fSEmmanuel Vadot
52*c66ec88fSEmmanuel Vadot- msi-parent: Describes the MSI parent of the root complex itself. Where
53*c66ec88fSEmmanuel Vadot  the root complex and MSI controller do not pass sideband data with MSI
54*c66ec88fSEmmanuel Vadot  writes, this property may be used to describe the MSI controller(s)
55*c66ec88fSEmmanuel Vadot  used by PCI devices under the root complex, if defined as such in the
56*c66ec88fSEmmanuel Vadot  binding for the root complex.
57*c66ec88fSEmmanuel Vadot
58*c66ec88fSEmmanuel Vadot
59*c66ec88fSEmmanuel VadotExample (1)
60*c66ec88fSEmmanuel Vadot===========
61*c66ec88fSEmmanuel Vadot
62*c66ec88fSEmmanuel Vadot/ {
63*c66ec88fSEmmanuel Vadot	#address-cells = <1>;
64*c66ec88fSEmmanuel Vadot	#size-cells = <1>;
65*c66ec88fSEmmanuel Vadot
66*c66ec88fSEmmanuel Vadot	msi: msi-controller@a {
67*c66ec88fSEmmanuel Vadot		reg = <0xa 0x1>;
68*c66ec88fSEmmanuel Vadot		compatible = "vendor,some-controller";
69*c66ec88fSEmmanuel Vadot		msi-controller;
70*c66ec88fSEmmanuel Vadot		#msi-cells = <1>;
71*c66ec88fSEmmanuel Vadot	};
72*c66ec88fSEmmanuel Vadot
73*c66ec88fSEmmanuel Vadot	pci: pci@f {
74*c66ec88fSEmmanuel Vadot		reg = <0xf 0x1>;
75*c66ec88fSEmmanuel Vadot		compatible = "vendor,pcie-root-complex";
76*c66ec88fSEmmanuel Vadot		device_type = "pci";
77*c66ec88fSEmmanuel Vadot
78*c66ec88fSEmmanuel Vadot		/*
79*c66ec88fSEmmanuel Vadot		 * The sideband data provided to the MSI controller is
80*c66ec88fSEmmanuel Vadot		 * the RID, identity-mapped.
81*c66ec88fSEmmanuel Vadot		 */
82*c66ec88fSEmmanuel Vadot		msi-map = <0x0 &msi_a 0x0 0x10000>,
83*c66ec88fSEmmanuel Vadot	};
84*c66ec88fSEmmanuel Vadot};
85*c66ec88fSEmmanuel Vadot
86*c66ec88fSEmmanuel Vadot
87*c66ec88fSEmmanuel VadotExample (2)
88*c66ec88fSEmmanuel Vadot===========
89*c66ec88fSEmmanuel Vadot
90*c66ec88fSEmmanuel Vadot/ {
91*c66ec88fSEmmanuel Vadot	#address-cells = <1>;
92*c66ec88fSEmmanuel Vadot	#size-cells = <1>;
93*c66ec88fSEmmanuel Vadot
94*c66ec88fSEmmanuel Vadot	msi: msi-controller@a {
95*c66ec88fSEmmanuel Vadot		reg = <0xa 0x1>;
96*c66ec88fSEmmanuel Vadot		compatible = "vendor,some-controller";
97*c66ec88fSEmmanuel Vadot		msi-controller;
98*c66ec88fSEmmanuel Vadot		#msi-cells = <1>;
99*c66ec88fSEmmanuel Vadot	};
100*c66ec88fSEmmanuel Vadot
101*c66ec88fSEmmanuel Vadot	pci: pci@f {
102*c66ec88fSEmmanuel Vadot		reg = <0xf 0x1>;
103*c66ec88fSEmmanuel Vadot		compatible = "vendor,pcie-root-complex";
104*c66ec88fSEmmanuel Vadot		device_type = "pci";
105*c66ec88fSEmmanuel Vadot
106*c66ec88fSEmmanuel Vadot		/*
107*c66ec88fSEmmanuel Vadot		 * The sideband data provided to the MSI controller is
108*c66ec88fSEmmanuel Vadot		 * the RID, masked to only the device and function bits.
109*c66ec88fSEmmanuel Vadot		 */
110*c66ec88fSEmmanuel Vadot		msi-map = <0x0 &msi_a 0x0 0x100>,
111*c66ec88fSEmmanuel Vadot		msi-map-mask = <0xff>
112*c66ec88fSEmmanuel Vadot	};
113*c66ec88fSEmmanuel Vadot};
114*c66ec88fSEmmanuel Vadot
115*c66ec88fSEmmanuel Vadot
116*c66ec88fSEmmanuel VadotExample (3)
117*c66ec88fSEmmanuel Vadot===========
118*c66ec88fSEmmanuel Vadot
119*c66ec88fSEmmanuel Vadot/ {
120*c66ec88fSEmmanuel Vadot	#address-cells = <1>;
121*c66ec88fSEmmanuel Vadot	#size-cells = <1>;
122*c66ec88fSEmmanuel Vadot
123*c66ec88fSEmmanuel Vadot	msi: msi-controller@a {
124*c66ec88fSEmmanuel Vadot		reg = <0xa 0x1>;
125*c66ec88fSEmmanuel Vadot		compatible = "vendor,some-controller";
126*c66ec88fSEmmanuel Vadot		msi-controller;
127*c66ec88fSEmmanuel Vadot		#msi-cells = <1>;
128*c66ec88fSEmmanuel Vadot	};
129*c66ec88fSEmmanuel Vadot
130*c66ec88fSEmmanuel Vadot	pci: pci@f {
131*c66ec88fSEmmanuel Vadot		reg = <0xf 0x1>;
132*c66ec88fSEmmanuel Vadot		compatible = "vendor,pcie-root-complex";
133*c66ec88fSEmmanuel Vadot		device_type = "pci";
134*c66ec88fSEmmanuel Vadot
135*c66ec88fSEmmanuel Vadot		/*
136*c66ec88fSEmmanuel Vadot		 * The sideband data provided to the MSI controller is
137*c66ec88fSEmmanuel Vadot		 * the RID, but the high bit of the bus number is
138*c66ec88fSEmmanuel Vadot		 * ignored.
139*c66ec88fSEmmanuel Vadot		 */
140*c66ec88fSEmmanuel Vadot		msi-map = <0x0000 &msi 0x0000 0x8000>,
141*c66ec88fSEmmanuel Vadot			  <0x8000 &msi 0x0000 0x8000>;
142*c66ec88fSEmmanuel Vadot	};
143*c66ec88fSEmmanuel Vadot};
144*c66ec88fSEmmanuel Vadot
145*c66ec88fSEmmanuel Vadot
146*c66ec88fSEmmanuel VadotExample (4)
147*c66ec88fSEmmanuel Vadot===========
148*c66ec88fSEmmanuel Vadot
149*c66ec88fSEmmanuel Vadot/ {
150*c66ec88fSEmmanuel Vadot	#address-cells = <1>;
151*c66ec88fSEmmanuel Vadot	#size-cells = <1>;
152*c66ec88fSEmmanuel Vadot
153*c66ec88fSEmmanuel Vadot	msi: msi-controller@a {
154*c66ec88fSEmmanuel Vadot		reg = <0xa 0x1>;
155*c66ec88fSEmmanuel Vadot		compatible = "vendor,some-controller";
156*c66ec88fSEmmanuel Vadot		msi-controller;
157*c66ec88fSEmmanuel Vadot		#msi-cells = <1>;
158*c66ec88fSEmmanuel Vadot	};
159*c66ec88fSEmmanuel Vadot
160*c66ec88fSEmmanuel Vadot	pci: pci@f {
161*c66ec88fSEmmanuel Vadot		reg = <0xf 0x1>;
162*c66ec88fSEmmanuel Vadot		compatible = "vendor,pcie-root-complex";
163*c66ec88fSEmmanuel Vadot		device_type = "pci";
164*c66ec88fSEmmanuel Vadot
165*c66ec88fSEmmanuel Vadot		/*
166*c66ec88fSEmmanuel Vadot		 * The sideband data provided to the MSI controller is
167*c66ec88fSEmmanuel Vadot		 * the RID, but the high bit of the bus number is
168*c66ec88fSEmmanuel Vadot		 * negated.
169*c66ec88fSEmmanuel Vadot		 */
170*c66ec88fSEmmanuel Vadot		msi-map = <0x0000 &msi 0x8000 0x8000>,
171*c66ec88fSEmmanuel Vadot			  <0x8000 &msi 0x0000 0x8000>;
172*c66ec88fSEmmanuel Vadot	};
173*c66ec88fSEmmanuel Vadot};
174*c66ec88fSEmmanuel Vadot
175*c66ec88fSEmmanuel Vadot
176*c66ec88fSEmmanuel VadotExample (5)
177*c66ec88fSEmmanuel Vadot===========
178*c66ec88fSEmmanuel Vadot
179*c66ec88fSEmmanuel Vadot/ {
180*c66ec88fSEmmanuel Vadot	#address-cells = <1>;
181*c66ec88fSEmmanuel Vadot	#size-cells = <1>;
182*c66ec88fSEmmanuel Vadot
183*c66ec88fSEmmanuel Vadot	msi_a: msi-controller@a {
184*c66ec88fSEmmanuel Vadot		reg = <0xa 0x1>;
185*c66ec88fSEmmanuel Vadot		compatible = "vendor,some-controller";
186*c66ec88fSEmmanuel Vadot		msi-controller;
187*c66ec88fSEmmanuel Vadot		#msi-cells = <1>;
188*c66ec88fSEmmanuel Vadot	};
189*c66ec88fSEmmanuel Vadot
190*c66ec88fSEmmanuel Vadot	msi_b: msi-controller@b {
191*c66ec88fSEmmanuel Vadot		reg = <0xb 0x1>;
192*c66ec88fSEmmanuel Vadot		compatible = "vendor,some-controller";
193*c66ec88fSEmmanuel Vadot		msi-controller;
194*c66ec88fSEmmanuel Vadot		#msi-cells = <1>;
195*c66ec88fSEmmanuel Vadot	};
196*c66ec88fSEmmanuel Vadot
197*c66ec88fSEmmanuel Vadot	msi_c: msi-controller@c {
198*c66ec88fSEmmanuel Vadot		reg = <0xc 0x1>;
199*c66ec88fSEmmanuel Vadot		compatible = "vendor,some-controller";
200*c66ec88fSEmmanuel Vadot		msi-controller;
201*c66ec88fSEmmanuel Vadot		#msi-cells = <1>;
202*c66ec88fSEmmanuel Vadot	};
203*c66ec88fSEmmanuel Vadot
204*c66ec88fSEmmanuel Vadot	pci: pci@f {
205*c66ec88fSEmmanuel Vadot		reg = <0xf 0x1>;
206*c66ec88fSEmmanuel Vadot		compatible = "vendor,pcie-root-complex";
207*c66ec88fSEmmanuel Vadot		device_type = "pci";
208*c66ec88fSEmmanuel Vadot
209*c66ec88fSEmmanuel Vadot		/*
210*c66ec88fSEmmanuel Vadot		 * The sideband data provided to MSI controller a is the
211*c66ec88fSEmmanuel Vadot		 * RID, but the high bit of the bus number is negated.
212*c66ec88fSEmmanuel Vadot		 * The sideband data provided to MSI controller b is the
213*c66ec88fSEmmanuel Vadot		 * RID, identity-mapped.
214*c66ec88fSEmmanuel Vadot		 * MSI controller c is not addressable.
215*c66ec88fSEmmanuel Vadot		 */
216*c66ec88fSEmmanuel Vadot		msi-map = <0x0000 &msi_a 0x8000 0x08000>,
217*c66ec88fSEmmanuel Vadot			  <0x8000 &msi_a 0x0000 0x08000>,
218*c66ec88fSEmmanuel Vadot			  <0x0000 &msi_b 0x0000 0x10000>;
219*c66ec88fSEmmanuel Vadot	};
220*c66ec88fSEmmanuel Vadot};
221