1*c66ec88fSEmmanuel VadotGPIO-based multiplexer controller bindings 2*c66ec88fSEmmanuel Vadot 3*c66ec88fSEmmanuel VadotDefine what GPIO pins are used to control a multiplexer. Or several 4*c66ec88fSEmmanuel Vadotmultiplexers, if the same pins control more than one multiplexer. 5*c66ec88fSEmmanuel Vadot 6*c66ec88fSEmmanuel VadotRequired properties: 7*c66ec88fSEmmanuel Vadot- compatible : "gpio-mux" 8*c66ec88fSEmmanuel Vadot- mux-gpios : list of gpios used to control the multiplexer, least 9*c66ec88fSEmmanuel Vadot significant bit first. 10*c66ec88fSEmmanuel Vadot- #mux-control-cells : <0> 11*c66ec88fSEmmanuel Vadot* Standard mux-controller bindings as decribed in mux-controller.txt 12*c66ec88fSEmmanuel Vadot 13*c66ec88fSEmmanuel VadotOptional properties: 14*c66ec88fSEmmanuel Vadot- idle-state : if present, the state the mux will have when idle. The 15*c66ec88fSEmmanuel Vadot special state MUX_IDLE_AS_IS is the default. 16*c66ec88fSEmmanuel Vadot 17*c66ec88fSEmmanuel VadotThe multiplexer state is defined as the number represented by the 18*c66ec88fSEmmanuel Vadotmultiplexer GPIO pins, where the first pin is the least significant 19*c66ec88fSEmmanuel Vadotbit. An active pin is a binary 1, an inactive pin is a binary 0. 20*c66ec88fSEmmanuel Vadot 21*c66ec88fSEmmanuel VadotExample: 22*c66ec88fSEmmanuel Vadot 23*c66ec88fSEmmanuel Vadot mux: mux-controller { 24*c66ec88fSEmmanuel Vadot compatible = "gpio-mux"; 25*c66ec88fSEmmanuel Vadot #mux-control-cells = <0>; 26*c66ec88fSEmmanuel Vadot 27*c66ec88fSEmmanuel Vadot mux-gpios = <&pioA 0 GPIO_ACTIVE_HIGH>, 28*c66ec88fSEmmanuel Vadot <&pioA 1 GPIO_ACTIVE_HIGH>; 29*c66ec88fSEmmanuel Vadot }; 30*c66ec88fSEmmanuel Vadot 31*c66ec88fSEmmanuel Vadot adc-mux { 32*c66ec88fSEmmanuel Vadot compatible = "io-channel-mux"; 33*c66ec88fSEmmanuel Vadot io-channels = <&adc 0>; 34*c66ec88fSEmmanuel Vadot io-channel-names = "parent"; 35*c66ec88fSEmmanuel Vadot 36*c66ec88fSEmmanuel Vadot mux-controls = <&mux>; 37*c66ec88fSEmmanuel Vadot 38*c66ec88fSEmmanuel Vadot channels = "sync-1", "in", "out", "sync-2"; 39*c66ec88fSEmmanuel Vadot }; 40*c66ec88fSEmmanuel Vadot 41*c66ec88fSEmmanuel Vadot i2c-mux { 42*c66ec88fSEmmanuel Vadot compatible = "i2c-mux"; 43*c66ec88fSEmmanuel Vadot i2c-parent = <&i2c1>; 44*c66ec88fSEmmanuel Vadot 45*c66ec88fSEmmanuel Vadot mux-controls = <&mux>; 46*c66ec88fSEmmanuel Vadot 47*c66ec88fSEmmanuel Vadot #address-cells = <1>; 48*c66ec88fSEmmanuel Vadot #size-cells = <0>; 49*c66ec88fSEmmanuel Vadot 50*c66ec88fSEmmanuel Vadot i2c@0 { 51*c66ec88fSEmmanuel Vadot reg = <0>; 52*c66ec88fSEmmanuel Vadot #address-cells = <1>; 53*c66ec88fSEmmanuel Vadot #size-cells = <0>; 54*c66ec88fSEmmanuel Vadot 55*c66ec88fSEmmanuel Vadot ssd1307: oled@3c { 56*c66ec88fSEmmanuel Vadot /* ... */ 57*c66ec88fSEmmanuel Vadot }; 58*c66ec88fSEmmanuel Vadot }; 59*c66ec88fSEmmanuel Vadot 60*c66ec88fSEmmanuel Vadot i2c@3 { 61*c66ec88fSEmmanuel Vadot reg = <3>; 62*c66ec88fSEmmanuel Vadot #address-cells = <1>; 63*c66ec88fSEmmanuel Vadot #size-cells = <0>; 64*c66ec88fSEmmanuel Vadot 65*c66ec88fSEmmanuel Vadot pca9555: pca9555@20 { 66*c66ec88fSEmmanuel Vadot /* ... */ 67*c66ec88fSEmmanuel Vadot }; 68*c66ec88fSEmmanuel Vadot }; 69*c66ec88fSEmmanuel Vadot }; 70