1c66ec88fSEmmanuel VadotSMI (Smart Multimedia Interface) Common 2c66ec88fSEmmanuel Vadot 3c66ec88fSEmmanuel VadotThe hardware block diagram please check bindings/iommu/mediatek,iommu.txt 4c66ec88fSEmmanuel Vadot 5c66ec88fSEmmanuel VadotMediatek SMI have two generations of HW architecture, here is the list 6c66ec88fSEmmanuel Vadotwhich generation the SoCs use: 7c66ec88fSEmmanuel Vadotgeneration 1: mt2701 and mt7623. 8*6be33864SEmmanuel Vadotgeneration 2: mt2712, mt6779, mt8167, mt8173 and mt8183. 9c66ec88fSEmmanuel Vadot 10c66ec88fSEmmanuel VadotThere's slight differences between the two SMI, for generation 2, the 11c66ec88fSEmmanuel Vadotregister which control the iommu port is at each larb's register base. But 12c66ec88fSEmmanuel Vadotfor generation 1, the register is at smi ao base(smi always on register 13c66ec88fSEmmanuel Vadotbase). Besides that, the smi async clock should be prepared and enabled for 14c66ec88fSEmmanuel VadotSMI generation 1 to transform the smi clock into emi clock domain, but that is 15c66ec88fSEmmanuel Vadotnot needed for SMI generation 2. 16c66ec88fSEmmanuel Vadot 17c66ec88fSEmmanuel VadotRequired properties: 18c66ec88fSEmmanuel Vadot- compatible : must be one of : 19c66ec88fSEmmanuel Vadot "mediatek,mt2701-smi-common" 20c66ec88fSEmmanuel Vadot "mediatek,mt2712-smi-common" 21c66ec88fSEmmanuel Vadot "mediatek,mt6779-smi-common" 22c66ec88fSEmmanuel Vadot "mediatek,mt7623-smi-common", "mediatek,mt2701-smi-common" 23*6be33864SEmmanuel Vadot "mediatek,mt8167-smi-common" 24c66ec88fSEmmanuel Vadot "mediatek,mt8173-smi-common" 25c66ec88fSEmmanuel Vadot "mediatek,mt8183-smi-common" 26c66ec88fSEmmanuel Vadot- reg : the register and size of the SMI block. 27c66ec88fSEmmanuel Vadot- power-domains : a phandle to the power domain of this local arbiter. 28c66ec88fSEmmanuel Vadot- clocks : Must contain an entry for each entry in clock-names. 29c66ec88fSEmmanuel Vadot- clock-names : must contain 3 entries for generation 1 smi HW and 2 entries 30c66ec88fSEmmanuel Vadot for generation 2 smi HW as follows: 31c66ec88fSEmmanuel Vadot - "apb" : Advanced Peripheral Bus clock, It's the clock for setting 32c66ec88fSEmmanuel Vadot the register. 33c66ec88fSEmmanuel Vadot - "smi" : It's the clock for transfer data and command. 34c66ec88fSEmmanuel Vadot They may be the same if both source clocks are the same. 35c66ec88fSEmmanuel Vadot - "async" : asynchronous clock, it help transform the smi clock into the emi 36c66ec88fSEmmanuel Vadot clock domain, this clock is only needed by generation 1 smi HW. 37c66ec88fSEmmanuel Vadot and these 2 option clocks for generation 2 smi HW: 38c66ec88fSEmmanuel Vadot - "gals0": the path0 clock of GALS(Global Async Local Sync). 39c66ec88fSEmmanuel Vadot - "gals1": the path1 clock of GALS(Global Async Local Sync). 40c66ec88fSEmmanuel Vadot Here is the list which has this GALS: mt6779 and mt8183. 41c66ec88fSEmmanuel Vadot 42c66ec88fSEmmanuel VadotExample: 43c66ec88fSEmmanuel Vadot smi_common: smi@14022000 { 44c66ec88fSEmmanuel Vadot compatible = "mediatek,mt8173-smi-common"; 45c66ec88fSEmmanuel Vadot reg = <0 0x14022000 0 0x1000>; 46c66ec88fSEmmanuel Vadot power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; 47c66ec88fSEmmanuel Vadot clocks = <&mmsys CLK_MM_SMI_COMMON>, 48c66ec88fSEmmanuel Vadot <&mmsys CLK_MM_SMI_COMMON>; 49c66ec88fSEmmanuel Vadot clock-names = "apb", "smi"; 50c66ec88fSEmmanuel Vadot }; 51