1*8cc087a1SEmmanuel Vadot* LPDDR3 SDRAM memories compliant to JEDEC JESD209-3C 2*8cc087a1SEmmanuel Vadot 3*8cc087a1SEmmanuel VadotRequired properties: 4*8cc087a1SEmmanuel Vadot- compatible : Should be "<vendor>,<type>", and generic value "jedec,lpddr3". 5*8cc087a1SEmmanuel Vadot Example "<vendor>,<type>" values: 6*8cc087a1SEmmanuel Vadot "samsung,K3QF2F20DB" 7*8cc087a1SEmmanuel Vadot 8*8cc087a1SEmmanuel Vadot- density : <u32> representing density in Mb (Mega bits) 9*8cc087a1SEmmanuel Vadot- io-width : <u32> representing bus width. Possible values are 8, 16, 32, 64 10*8cc087a1SEmmanuel Vadot- #address-cells: Must be set to 1 11*8cc087a1SEmmanuel Vadot- #size-cells: Must be set to 0 12*8cc087a1SEmmanuel Vadot 13*8cc087a1SEmmanuel VadotOptional properties: 14*8cc087a1SEmmanuel Vadot 15*8cc087a1SEmmanuel Vadot- manufacturer-id : <u32> Manufacturer ID value read from Mode Register 5 16*8cc087a1SEmmanuel Vadot- revision-id : <u32 u32> Revision IDs read from Mode Registers 6 and 7 17*8cc087a1SEmmanuel Vadot 18*8cc087a1SEmmanuel VadotThe following optional properties represent the minimum value of some AC 19*8cc087a1SEmmanuel Vadottiming parameters of the DDR device in terms of number of clock cycles. 20*8cc087a1SEmmanuel VadotThese values shall be obtained from the device data-sheet. 21*8cc087a1SEmmanuel Vadot- tRFC-min-tck 22*8cc087a1SEmmanuel Vadot- tRRD-min-tck 23*8cc087a1SEmmanuel Vadot- tRPab-min-tck 24*8cc087a1SEmmanuel Vadot- tRPpb-min-tck 25*8cc087a1SEmmanuel Vadot- tRCD-min-tck 26*8cc087a1SEmmanuel Vadot- tRC-min-tck 27*8cc087a1SEmmanuel Vadot- tRAS-min-tck 28*8cc087a1SEmmanuel Vadot- tWTR-min-tck 29*8cc087a1SEmmanuel Vadot- tWR-min-tck 30*8cc087a1SEmmanuel Vadot- tRTP-min-tck 31*8cc087a1SEmmanuel Vadot- tW2W-C2C-min-tck 32*8cc087a1SEmmanuel Vadot- tR2R-C2C-min-tck 33*8cc087a1SEmmanuel Vadot- tWL-min-tck 34*8cc087a1SEmmanuel Vadot- tDQSCK-min-tck 35*8cc087a1SEmmanuel Vadot- tRL-min-tck 36*8cc087a1SEmmanuel Vadot- tFAW-min-tck 37*8cc087a1SEmmanuel Vadot- tXSR-min-tck 38*8cc087a1SEmmanuel Vadot- tXP-min-tck 39*8cc087a1SEmmanuel Vadot- tCKE-min-tck 40*8cc087a1SEmmanuel Vadot- tCKESR-min-tck 41*8cc087a1SEmmanuel Vadot- tMRD-min-tck 42*8cc087a1SEmmanuel Vadot 43*8cc087a1SEmmanuel VadotChild nodes: 44*8cc087a1SEmmanuel Vadot- The lpddr3 node may have one or more child nodes of type "lpddr3-timings". 45*8cc087a1SEmmanuel Vadot "lpddr3-timings" provides AC timing parameters of the device for 46*8cc087a1SEmmanuel Vadot a given speed-bin. Please see 47*8cc087a1SEmmanuel Vadot Documentation/devicetree/bindings/memory-controllers/ddr/lpddr3-timings.txt 48*8cc087a1SEmmanuel Vadot for more information on "lpddr3-timings" 49*8cc087a1SEmmanuel Vadot 50*8cc087a1SEmmanuel VadotExample: 51*8cc087a1SEmmanuel Vadot 52*8cc087a1SEmmanuel Vadotsamsung_K3QF2F20DB: lpddr3 { 53*8cc087a1SEmmanuel Vadot compatible = "samsung,K3QF2F20DB", "jedec,lpddr3"; 54*8cc087a1SEmmanuel Vadot density = <16384>; 55*8cc087a1SEmmanuel Vadot io-width = <32>; 56*8cc087a1SEmmanuel Vadot manufacturer-id = <1>; 57*8cc087a1SEmmanuel Vadot revision-id = <123 234>; 58*8cc087a1SEmmanuel Vadot #address-cells = <1>; 59*8cc087a1SEmmanuel Vadot #size-cells = <0>; 60*8cc087a1SEmmanuel Vadot 61*8cc087a1SEmmanuel Vadot tRFC-min-tck = <17>; 62*8cc087a1SEmmanuel Vadot tRRD-min-tck = <2>; 63*8cc087a1SEmmanuel Vadot tRPab-min-tck = <2>; 64*8cc087a1SEmmanuel Vadot tRPpb-min-tck = <2>; 65*8cc087a1SEmmanuel Vadot tRCD-min-tck = <3>; 66*8cc087a1SEmmanuel Vadot tRC-min-tck = <6>; 67*8cc087a1SEmmanuel Vadot tRAS-min-tck = <5>; 68*8cc087a1SEmmanuel Vadot tWTR-min-tck = <2>; 69*8cc087a1SEmmanuel Vadot tWR-min-tck = <7>; 70*8cc087a1SEmmanuel Vadot tRTP-min-tck = <2>; 71*8cc087a1SEmmanuel Vadot tW2W-C2C-min-tck = <0>; 72*8cc087a1SEmmanuel Vadot tR2R-C2C-min-tck = <0>; 73*8cc087a1SEmmanuel Vadot tWL-min-tck = <8>; 74*8cc087a1SEmmanuel Vadot tDQSCK-min-tck = <5>; 75*8cc087a1SEmmanuel Vadot tRL-min-tck = <14>; 76*8cc087a1SEmmanuel Vadot tFAW-min-tck = <5>; 77*8cc087a1SEmmanuel Vadot tXSR-min-tck = <12>; 78*8cc087a1SEmmanuel Vadot tXP-min-tck = <2>; 79*8cc087a1SEmmanuel Vadot tCKE-min-tck = <2>; 80*8cc087a1SEmmanuel Vadot tCKESR-min-tck = <2>; 81*8cc087a1SEmmanuel Vadot tMRD-min-tck = <5>; 82*8cc087a1SEmmanuel Vadot 83*8cc087a1SEmmanuel Vadot timings_samsung_K3QF2F20DB_800mhz: lpddr3-timings@800000000 { 84*8cc087a1SEmmanuel Vadot compatible = "jedec,lpddr3-timings"; 85*8cc087a1SEmmanuel Vadot /* workaround: 'reg' shows max-freq */ 86*8cc087a1SEmmanuel Vadot reg = <800000000>; 87*8cc087a1SEmmanuel Vadot min-freq = <100000000>; 88*8cc087a1SEmmanuel Vadot tRFC = <65000>; 89*8cc087a1SEmmanuel Vadot tRRD = <6000>; 90*8cc087a1SEmmanuel Vadot tRPab = <12000>; 91*8cc087a1SEmmanuel Vadot tRPpb = <12000>; 92*8cc087a1SEmmanuel Vadot tRCD = <10000>; 93*8cc087a1SEmmanuel Vadot tRC = <33750>; 94*8cc087a1SEmmanuel Vadot tRAS = <23000>; 95*8cc087a1SEmmanuel Vadot tWTR = <3750>; 96*8cc087a1SEmmanuel Vadot tWR = <7500>; 97*8cc087a1SEmmanuel Vadot tRTP = <3750>; 98*8cc087a1SEmmanuel Vadot tW2W-C2C = <0>; 99*8cc087a1SEmmanuel Vadot tR2R-C2C = <0>; 100*8cc087a1SEmmanuel Vadot tFAW = <25000>; 101*8cc087a1SEmmanuel Vadot tXSR = <70000>; 102*8cc087a1SEmmanuel Vadot tXP = <3750>; 103*8cc087a1SEmmanuel Vadot tCKE = <3750>; 104*8cc087a1SEmmanuel Vadot tCKESR = <3750>; 105*8cc087a1SEmmanuel Vadot tMRD = <7000>; 106*8cc087a1SEmmanuel Vadot }; 107*8cc087a1SEmmanuel Vadot} 108