1*c66ec88fSEmmanuel VadotDDR PHY Front End (DPFE) for Broadcom STB 2*c66ec88fSEmmanuel Vadot========================================= 3*c66ec88fSEmmanuel Vadot 4*c66ec88fSEmmanuel VadotDPFE and the DPFE firmware provide an interface for the host CPU to 5*c66ec88fSEmmanuel Vadotcommunicate with the DCPU, which resides inside the DDR PHY. 6*c66ec88fSEmmanuel Vadot 7*c66ec88fSEmmanuel VadotThere are three memory regions for interacting with the DCPU. These are 8*c66ec88fSEmmanuel Vadotspecified in a single reg property. 9*c66ec88fSEmmanuel Vadot 10*c66ec88fSEmmanuel VadotRequired properties: 11*c66ec88fSEmmanuel Vadot - compatible: must be "brcm,bcm7271-dpfe-cpu", "brcm,bcm7268-dpfe-cpu" 12*c66ec88fSEmmanuel Vadot or "brcm,dpfe-cpu" 13*c66ec88fSEmmanuel Vadot - reg: must reference three register ranges 14*c66ec88fSEmmanuel Vadot - start address and length of the DCPU register space 15*c66ec88fSEmmanuel Vadot - start address and length of the DCPU data memory space 16*c66ec88fSEmmanuel Vadot - start address and length of the DCPU instruction memory space 17*c66ec88fSEmmanuel Vadot - reg-names: must contain "dpfe-cpu", "dpfe-dmem", and "dpfe-imem"; 18*c66ec88fSEmmanuel Vadot they must be in the same order as the register declarations 19*c66ec88fSEmmanuel Vadot 20*c66ec88fSEmmanuel VadotExample: 21*c66ec88fSEmmanuel Vadot dpfe_cpu0: dpfe-cpu@f1132000 { 22*c66ec88fSEmmanuel Vadot compatible = "brcm,bcm7271-dpfe-cpu", "brcm,dpfe-cpu"; 23*c66ec88fSEmmanuel Vadot reg = <0xf1132000 0x180 24*c66ec88fSEmmanuel Vadot 0xf1134000 0x1000 25*c66ec88fSEmmanuel Vadot 0xf1138000 0x4000>; 26*c66ec88fSEmmanuel Vadot reg-names = "dpfe-cpu", "dpfe-dmem", "dpfe-imem"; 27*c66ec88fSEmmanuel Vadot }; 28