xref: /freebsd-src/sys/contrib/device-tree/Bindings/mailbox/mtk,adsp-mbox.yaml (revision b2d2a78ad80ec68d4a17f5aef97d21686cb1e29b)
1c9ccf3a3SEmmanuel Vadot# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2c9ccf3a3SEmmanuel Vadot%YAML 1.2
3c9ccf3a3SEmmanuel Vadot---
4c9ccf3a3SEmmanuel Vadot$id: http://devicetree.org/schemas/mailbox/mtk,adsp-mbox.yaml#
5c9ccf3a3SEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml#
6c9ccf3a3SEmmanuel Vadot
7c9ccf3a3SEmmanuel Vadottitle: Mediatek ADSP mailbox
8c9ccf3a3SEmmanuel Vadot
9c9ccf3a3SEmmanuel Vadotmaintainers:
10c9ccf3a3SEmmanuel Vadot  - Allen-KH Cheng <Allen-KH.Cheng@mediatek.com>
11c9ccf3a3SEmmanuel Vadot
12c9ccf3a3SEmmanuel Vadotdescription: |
13c9ccf3a3SEmmanuel Vadot  The MTK ADSP mailbox Inter-Processor Communication (IPC) enables the SoC
14d5b0e70fSEmmanuel Vadot  to communicate with ADSP by passing messages through two mailbox channels.
15c9ccf3a3SEmmanuel Vadot  The MTK ADSP mailbox IPC also provides the ability for one processor to
16c9ccf3a3SEmmanuel Vadot  signal the other processor using interrupts.
17c9ccf3a3SEmmanuel Vadot
18c9ccf3a3SEmmanuel Vadotproperties:
19c9ccf3a3SEmmanuel Vadot  compatible:
20*b2d2a78aSEmmanuel Vadot    oneOf:
21*b2d2a78aSEmmanuel Vadot      - enum:
22d5b0e70fSEmmanuel Vadot          - mediatek,mt8186-adsp-mbox
23*b2d2a78aSEmmanuel Vadot          - mediatek,mt8195-adsp-mbox
24*b2d2a78aSEmmanuel Vadot      - items:
25*b2d2a78aSEmmanuel Vadot          - enum:
26*b2d2a78aSEmmanuel Vadot              - mediatek,mt8188-adsp-mbox
27*b2d2a78aSEmmanuel Vadot          - const: mediatek,mt8186-adsp-mbox
28*b2d2a78aSEmmanuel Vadot
29c9ccf3a3SEmmanuel Vadot
30c9ccf3a3SEmmanuel Vadot  "#mbox-cells":
31c9ccf3a3SEmmanuel Vadot    const: 0
32c9ccf3a3SEmmanuel Vadot
33c9ccf3a3SEmmanuel Vadot  reg:
34c9ccf3a3SEmmanuel Vadot    maxItems: 1
35c9ccf3a3SEmmanuel Vadot
36c9ccf3a3SEmmanuel Vadot  interrupts:
37c9ccf3a3SEmmanuel Vadot    maxItems: 1
38c9ccf3a3SEmmanuel Vadot
39c9ccf3a3SEmmanuel Vadotrequired:
40c9ccf3a3SEmmanuel Vadot  - compatible
41c9ccf3a3SEmmanuel Vadot  - "#mbox-cells"
42c9ccf3a3SEmmanuel Vadot  - reg
43c9ccf3a3SEmmanuel Vadot  - interrupts
44c9ccf3a3SEmmanuel Vadot
45c9ccf3a3SEmmanuel VadotadditionalProperties: false
46c9ccf3a3SEmmanuel Vadot
47c9ccf3a3SEmmanuel Vadotexamples:
48c9ccf3a3SEmmanuel Vadot  - |
49c9ccf3a3SEmmanuel Vadot    #include <dt-bindings/interrupt-controller/arm-gic.h>
50c9ccf3a3SEmmanuel Vadot    #include <dt-bindings/interrupt-controller/irq.h>
51c9ccf3a3SEmmanuel Vadot
52c9ccf3a3SEmmanuel Vadot    adsp_mailbox0:mailbox@10816000 {
53c9ccf3a3SEmmanuel Vadot        compatible = "mediatek,mt8195-adsp-mbox";
54c9ccf3a3SEmmanuel Vadot        #mbox-cells = <0>;
55c9ccf3a3SEmmanuel Vadot        reg = <0x10816000 0x1000>;
56c9ccf3a3SEmmanuel Vadot        interrupts = <GIC_SPI 702 IRQ_TYPE_LEVEL_HIGH 0>;
57c9ccf3a3SEmmanuel Vadot    };
58