1*c66ec88fSEmmanuel VadotDT bindings for the Renesas RZ/A1 Interrupt Controller 2*c66ec88fSEmmanuel Vadot 3*c66ec88fSEmmanuel VadotThe RZ/A1 Interrupt Controller is a front-end for the GIC found on Renesas 4*c66ec88fSEmmanuel VadotRZ/A1 and RZ/A2 SoCs: 5*c66ec88fSEmmanuel Vadot - IRQ sense select for 8 external interrupts, 1:1-mapped to 8 GIC SPI 6*c66ec88fSEmmanuel Vadot interrupts, 7*c66ec88fSEmmanuel Vadot - NMI edge select. 8*c66ec88fSEmmanuel Vadot 9*c66ec88fSEmmanuel VadotRequired properties: 10*c66ec88fSEmmanuel Vadot - compatible: Must be "renesas,<soctype>-irqc", and "renesas,rza1-irqc" as 11*c66ec88fSEmmanuel Vadot fallback. 12*c66ec88fSEmmanuel Vadot Examples with soctypes are: 13*c66ec88fSEmmanuel Vadot - "renesas,r7s72100-irqc" (RZ/A1H) 14*c66ec88fSEmmanuel Vadot - "renesas,r7s9210-irqc" (RZ/A2M) 15*c66ec88fSEmmanuel Vadot - #interrupt-cells: Must be 2 (an interrupt index and flags, as defined 16*c66ec88fSEmmanuel Vadot in interrupts.txt in this directory) 17*c66ec88fSEmmanuel Vadot - #address-cells: Must be zero 18*c66ec88fSEmmanuel Vadot - interrupt-controller: Marks the device as an interrupt controller 19*c66ec88fSEmmanuel Vadot - reg: Base address and length of the memory resource used by the interrupt 20*c66ec88fSEmmanuel Vadot controller 21*c66ec88fSEmmanuel Vadot - interrupt-map: Specifies the mapping from external interrupts to GIC 22*c66ec88fSEmmanuel Vadot interrupts 23*c66ec88fSEmmanuel Vadot - interrupt-map-mask: Must be <7 0> 24*c66ec88fSEmmanuel Vadot 25*c66ec88fSEmmanuel VadotExample: 26*c66ec88fSEmmanuel Vadot 27*c66ec88fSEmmanuel Vadot irqc: interrupt-controller@fcfef800 { 28*c66ec88fSEmmanuel Vadot compatible = "renesas,r7s72100-irqc", "renesas,rza1-irqc"; 29*c66ec88fSEmmanuel Vadot #interrupt-cells = <2>; 30*c66ec88fSEmmanuel Vadot #address-cells = <0>; 31*c66ec88fSEmmanuel Vadot interrupt-controller; 32*c66ec88fSEmmanuel Vadot reg = <0xfcfef800 0x6>; 33*c66ec88fSEmmanuel Vadot interrupt-map = 34*c66ec88fSEmmanuel Vadot <0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 35*c66ec88fSEmmanuel Vadot <1 0 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 36*c66ec88fSEmmanuel Vadot <2 0 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 37*c66ec88fSEmmanuel Vadot <3 0 &gic GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 38*c66ec88fSEmmanuel Vadot <4 0 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, 39*c66ec88fSEmmanuel Vadot <5 0 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>, 40*c66ec88fSEmmanuel Vadot <6 0 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, 41*c66ec88fSEmmanuel Vadot <7 0 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 42*c66ec88fSEmmanuel Vadot interrupt-map-mask = <7 0>; 43*c66ec88fSEmmanuel Vadot }; 44