1*c66ec88fSEmmanuel VadotNVIDIA Legacy Interrupt Controller 2*c66ec88fSEmmanuel Vadot 3*c66ec88fSEmmanuel VadotAll Tegra SoCs contain a legacy interrupt controller that routes 4*c66ec88fSEmmanuel Vadotinterrupts to the GIC, and also serves as a wakeup source. It is also 5*c66ec88fSEmmanuel Vadotreferred to as "ictlr", hence the name of the binding. 6*c66ec88fSEmmanuel Vadot 7*c66ec88fSEmmanuel VadotThe HW block exposes a number of interrupt controllers, each 8*c66ec88fSEmmanuel Vadotimplementing a set of 32 interrupts. 9*c66ec88fSEmmanuel Vadot 10*c66ec88fSEmmanuel VadotRequired properties: 11*c66ec88fSEmmanuel Vadot 12*c66ec88fSEmmanuel Vadot- compatible : should be: "nvidia,tegra<chip>-ictlr". The LIC on 13*c66ec88fSEmmanuel Vadot subsequent SoCs remained backwards-compatible with Tegra30, so on 14*c66ec88fSEmmanuel Vadot Tegra generations later than Tegra30 the compatible value should 15*c66ec88fSEmmanuel Vadot include "nvidia,tegra30-ictlr". 16*c66ec88fSEmmanuel Vadot- reg : Specifies base physical address and size of the registers. 17*c66ec88fSEmmanuel Vadot Each controller must be described separately (Tegra20 has 4 of them, 18*c66ec88fSEmmanuel Vadot whereas Tegra30 and later have 5). 19*c66ec88fSEmmanuel Vadot- interrupt-controller : Identifies the node as an interrupt controller. 20*c66ec88fSEmmanuel Vadot- #interrupt-cells : Specifies the number of cells needed to encode an 21*c66ec88fSEmmanuel Vadot interrupt source. The value must be 3. 22*c66ec88fSEmmanuel Vadot 23*c66ec88fSEmmanuel VadotNotes: 24*c66ec88fSEmmanuel Vadot 25*c66ec88fSEmmanuel Vadot- Because this HW ultimately routes interrupts to the GIC, the 26*c66ec88fSEmmanuel Vadot interrupt specifier must be that of the GIC. 27*c66ec88fSEmmanuel Vadot- Only SPIs can use the ictlr as an interrupt parent. SGIs and PPIs 28*c66ec88fSEmmanuel Vadot are explicitly forbidden. 29*c66ec88fSEmmanuel Vadot 30*c66ec88fSEmmanuel VadotExample: 31*c66ec88fSEmmanuel Vadot 32*c66ec88fSEmmanuel Vadot ictlr: interrupt-controller@60004000 { 33*c66ec88fSEmmanuel Vadot compatible = "nvidia,tegra20-ictlr", "nvidia,tegra-ictlr"; 34*c66ec88fSEmmanuel Vadot reg = <0x60004000 64>, 35*c66ec88fSEmmanuel Vadot <0x60004100 64>, 36*c66ec88fSEmmanuel Vadot <0x60004200 64>, 37*c66ec88fSEmmanuel Vadot <0x60004300 64>; 38*c66ec88fSEmmanuel Vadot interrupt-controller; 39*c66ec88fSEmmanuel Vadot #interrupt-cells = <3>; 40*c66ec88fSEmmanuel Vadot interrupt-parent = <&intc>; 41*c66ec88fSEmmanuel Vadot }; 42