1c66ec88fSEmmanuel Vadot# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2c66ec88fSEmmanuel Vadot%YAML 1.2 3c66ec88fSEmmanuel Vadot--- 4fac71e4eSEmmanuel Vadot$id: http://devicetree.org/schemas/interrupt-controller/loongson,liointc.yaml# 5fac71e4eSEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml# 6c66ec88fSEmmanuel Vadot 7c66ec88fSEmmanuel Vadottitle: Loongson Local I/O Interrupt Controller 8c66ec88fSEmmanuel Vadot 9c66ec88fSEmmanuel Vadotmaintainers: 10c66ec88fSEmmanuel Vadot - Jiaxun Yang <jiaxun.yang@flygoat.com> 11c66ec88fSEmmanuel Vadot 12c66ec88fSEmmanuel Vadotdescription: | 132eb4d8dcSEmmanuel Vadot This interrupt controller is found in the Loongson-3 family of chips and 14*8d13bc63SEmmanuel Vadot Loongson-2K series chips, as the primary package interrupt controller which 152eb4d8dcSEmmanuel Vadot can route local I/O interrupt to interrupt lines of cores. 16*8d13bc63SEmmanuel Vadot Be aware of the following points. 17*8d13bc63SEmmanuel Vadot 1.The Loongson-2K0500 is a single core CPU; 18*8d13bc63SEmmanuel Vadot 2.The Loongson-2K0500/2K1000 has 64 device interrupt sources as inputs, so we 19*8d13bc63SEmmanuel Vadot need to define two nodes in dts{i} to describe the "0-31" and "32-61" interrupt 20*8d13bc63SEmmanuel Vadot sources respectively. 21c66ec88fSEmmanuel Vadot 22c66ec88fSEmmanuel VadotallOf: 23c66ec88fSEmmanuel Vadot - $ref: /schemas/interrupt-controller.yaml# 24c66ec88fSEmmanuel Vadot 25c66ec88fSEmmanuel Vadotproperties: 26c66ec88fSEmmanuel Vadot compatible: 27354d7675SEmmanuel Vadot enum: 28354d7675SEmmanuel Vadot - loongson,liointc-1.0 29354d7675SEmmanuel Vadot - loongson,liointc-1.0a 30354d7675SEmmanuel Vadot - loongson,liointc-2.0 31c66ec88fSEmmanuel Vadot 32c66ec88fSEmmanuel Vadot reg: 332eb4d8dcSEmmanuel Vadot minItems: 1 342eb4d8dcSEmmanuel Vadot maxItems: 3 352eb4d8dcSEmmanuel Vadot 362eb4d8dcSEmmanuel Vadot reg-names: 372eb4d8dcSEmmanuel Vadot items: 382eb4d8dcSEmmanuel Vadot - const: main 392eb4d8dcSEmmanuel Vadot - const: isr0 402eb4d8dcSEmmanuel Vadot - const: isr1 41*8d13bc63SEmmanuel Vadot minItems: 2 42c66ec88fSEmmanuel Vadot 43c66ec88fSEmmanuel Vadot interrupt-controller: true 44c66ec88fSEmmanuel Vadot 45c66ec88fSEmmanuel Vadot interrupts: 46c66ec88fSEmmanuel Vadot description: 47c66ec88fSEmmanuel Vadot Interrupt source of the CPU interrupts. 48c66ec88fSEmmanuel Vadot minItems: 1 49c66ec88fSEmmanuel Vadot maxItems: 4 50c66ec88fSEmmanuel Vadot 51c66ec88fSEmmanuel Vadot interrupt-names: 52c66ec88fSEmmanuel Vadot description: List of names for the parent interrupts. 53c66ec88fSEmmanuel Vadot items: 54*8d13bc63SEmmanuel Vadot pattern: int[0-3] 55c66ec88fSEmmanuel Vadot minItems: 1 56*8d13bc63SEmmanuel Vadot maxItems: 4 57c66ec88fSEmmanuel Vadot 58c66ec88fSEmmanuel Vadot '#interrupt-cells': 59c66ec88fSEmmanuel Vadot const: 2 60c66ec88fSEmmanuel Vadot 61fac71e4eSEmmanuel Vadot loongson,parent_int_map: 62c66ec88fSEmmanuel Vadot description: | 63c66ec88fSEmmanuel Vadot This property points how the children interrupts will be mapped into CPU 64c66ec88fSEmmanuel Vadot interrupt lines. Each cell refers to a parent interrupt line from 0 to 3 65c66ec88fSEmmanuel Vadot and each bit in the cell refers to a child interrupt from 0 to 31. 66c66ec88fSEmmanuel Vadot If a CPU interrupt line didn't connect with liointc, then keep its 67c66ec88fSEmmanuel Vadot cell with zero. 68c66ec88fSEmmanuel Vadot $ref: /schemas/types.yaml#/definitions/uint32-array 69c66ec88fSEmmanuel Vadot minItems: 4 70c66ec88fSEmmanuel Vadot maxItems: 4 71c66ec88fSEmmanuel Vadot 72c66ec88fSEmmanuel Vadotrequired: 73c66ec88fSEmmanuel Vadot - compatible 74c66ec88fSEmmanuel Vadot - reg 75c66ec88fSEmmanuel Vadot - interrupts 76*8d13bc63SEmmanuel Vadot - interrupt-names 77c66ec88fSEmmanuel Vadot - interrupt-controller 78c66ec88fSEmmanuel Vadot - '#interrupt-cells' 79fac71e4eSEmmanuel Vadot - loongson,parent_int_map 80c66ec88fSEmmanuel Vadot 81c66ec88fSEmmanuel Vadot 826be33864SEmmanuel VadotunevaluatedProperties: false 836be33864SEmmanuel Vadot 842eb4d8dcSEmmanuel Vadotif: 852eb4d8dcSEmmanuel Vadot properties: 862eb4d8dcSEmmanuel Vadot compatible: 872eb4d8dcSEmmanuel Vadot contains: 882eb4d8dcSEmmanuel Vadot enum: 892eb4d8dcSEmmanuel Vadot - loongson,liointc-2.0 902eb4d8dcSEmmanuel Vadot 912eb4d8dcSEmmanuel Vadotthen: 922eb4d8dcSEmmanuel Vadot properties: 932eb4d8dcSEmmanuel Vadot reg: 94*8d13bc63SEmmanuel Vadot minItems: 2 95*8d13bc63SEmmanuel Vadot maxItems: 3 962eb4d8dcSEmmanuel Vadot 972eb4d8dcSEmmanuel Vadot required: 982eb4d8dcSEmmanuel Vadot - reg-names 992eb4d8dcSEmmanuel Vadot 1002eb4d8dcSEmmanuel Vadotelse: 1012eb4d8dcSEmmanuel Vadot properties: 1022eb4d8dcSEmmanuel Vadot reg: 1032eb4d8dcSEmmanuel Vadot maxItems: 1 1042eb4d8dcSEmmanuel Vadot 105c66ec88fSEmmanuel Vadotexamples: 106c66ec88fSEmmanuel Vadot - | 107c66ec88fSEmmanuel Vadot iointc: interrupt-controller@3ff01400 { 108c66ec88fSEmmanuel Vadot compatible = "loongson,liointc-1.0"; 109c66ec88fSEmmanuel Vadot reg = <0x3ff01400 0x64>; 110c66ec88fSEmmanuel Vadot 111c66ec88fSEmmanuel Vadot interrupt-controller; 112c66ec88fSEmmanuel Vadot #interrupt-cells = <2>; 113c66ec88fSEmmanuel Vadot 114c66ec88fSEmmanuel Vadot interrupt-parent = <&cpuintc>; 115c66ec88fSEmmanuel Vadot interrupts = <2>, <3>; 116c66ec88fSEmmanuel Vadot interrupt-names = "int0", "int1"; 117c66ec88fSEmmanuel Vadot 118c66ec88fSEmmanuel Vadot loongson,parent_int_map = <0xf0ffffff>, /* int0 */ 119c66ec88fSEmmanuel Vadot <0x0f000000>, /* int1 */ 120c66ec88fSEmmanuel Vadot <0x00000000>, /* int2 */ 121c66ec88fSEmmanuel Vadot <0x00000000>; /* int3 */ 122c66ec88fSEmmanuel Vadot 123c66ec88fSEmmanuel Vadot }; 124c66ec88fSEmmanuel Vadot 125c66ec88fSEmmanuel Vadot... 126