1*c66ec88fSEmmanuel VadotInterrupt chips 2*c66ec88fSEmmanuel Vadot--------------- 3*c66ec88fSEmmanuel Vadot 4*c66ec88fSEmmanuel Vadot* Intel I/O Advanced Programmable Interrupt Controller (IO APIC) 5*c66ec88fSEmmanuel Vadot 6*c66ec88fSEmmanuel Vadot Required properties: 7*c66ec88fSEmmanuel Vadot -------------------- 8*c66ec88fSEmmanuel Vadot compatible = "intel,ce4100-ioapic"; 9*c66ec88fSEmmanuel Vadot #interrupt-cells = <2>; 10*c66ec88fSEmmanuel Vadot 11*c66ec88fSEmmanuel Vadot Device's interrupt property: 12*c66ec88fSEmmanuel Vadot 13*c66ec88fSEmmanuel Vadot interrupts = <P S>; 14*c66ec88fSEmmanuel Vadot 15*c66ec88fSEmmanuel Vadot The first number (P) represents the interrupt pin which is wired to the 16*c66ec88fSEmmanuel Vadot IO APIC. The second number (S) represents the sense of interrupt which 17*c66ec88fSEmmanuel Vadot should be configured and can be one of: 18*c66ec88fSEmmanuel Vadot 0 - Edge Rising 19*c66ec88fSEmmanuel Vadot 1 - Level Low 20*c66ec88fSEmmanuel Vadot 2 - Level High 21*c66ec88fSEmmanuel Vadot 3 - Edge Falling 22*c66ec88fSEmmanuel Vadot 23*c66ec88fSEmmanuel Vadot* Local APIC 24*c66ec88fSEmmanuel Vadot Required property: 25*c66ec88fSEmmanuel Vadot 26*c66ec88fSEmmanuel Vadot compatible = "intel,ce4100-lapic"; 27