1*c66ec88fSEmmanuel VadotXilinx Zynq FPGA Manager 2*c66ec88fSEmmanuel Vadot 3*c66ec88fSEmmanuel VadotRequired properties: 4*c66ec88fSEmmanuel Vadot- compatible: should contain "xlnx,zynq-devcfg-1.0" 5*c66ec88fSEmmanuel Vadot- reg: base address and size for memory mapped io 6*c66ec88fSEmmanuel Vadot- interrupts: interrupt for the FPGA manager device 7*c66ec88fSEmmanuel Vadot- clocks: phandle for clocks required operation 8*c66ec88fSEmmanuel Vadot- clock-names: name for the clock, should be "ref_clk" 9*c66ec88fSEmmanuel Vadot- syscon: phandle for access to SLCR registers 10*c66ec88fSEmmanuel Vadot 11*c66ec88fSEmmanuel VadotExample: 12*c66ec88fSEmmanuel Vadot devcfg: devcfg@f8007000 { 13*c66ec88fSEmmanuel Vadot compatible = "xlnx,zynq-devcfg-1.0"; 14*c66ec88fSEmmanuel Vadot reg = <0xf8007000 0x100>; 15*c66ec88fSEmmanuel Vadot interrupts = <0 8 4>; 16*c66ec88fSEmmanuel Vadot clocks = <&clkc 12>; 17*c66ec88fSEmmanuel Vadot clock-names = "ref_clk"; 18*c66ec88fSEmmanuel Vadot syscon = <&slcr>; 19*c66ec88fSEmmanuel Vadot }; 20