1c9ccf3a3SEmmanuel Vadot# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2c9ccf3a3SEmmanuel Vadot%YAML 1.2 3c9ccf3a3SEmmanuel Vadot--- 4c9ccf3a3SEmmanuel Vadot$id: http://devicetree.org/schemas/display/mediatek/mediatek,merge.yaml# 5c9ccf3a3SEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml# 6c9ccf3a3SEmmanuel Vadot 7c9ccf3a3SEmmanuel Vadottitle: Mediatek display merge 8c9ccf3a3SEmmanuel Vadot 9c9ccf3a3SEmmanuel Vadotmaintainers: 10c9ccf3a3SEmmanuel Vadot - Chun-Kuang Hu <chunkuang.hu@kernel.org> 11c9ccf3a3SEmmanuel Vadot - Philipp Zabel <p.zabel@pengutronix.de> 12c9ccf3a3SEmmanuel Vadot 13c9ccf3a3SEmmanuel Vadotdescription: | 14c9ccf3a3SEmmanuel Vadot Mediatek display merge, namely MERGE, is used to merge two slice-per-line 15c9ccf3a3SEmmanuel Vadot inputs into one side-by-side output. 16c9ccf3a3SEmmanuel Vadot MERGE device node must be siblings to the central MMSYS_CONFIG node. 17c9ccf3a3SEmmanuel Vadot For a description of the MMSYS_CONFIG binding, see 18c9ccf3a3SEmmanuel Vadot Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml 19c9ccf3a3SEmmanuel Vadot for details. 20c9ccf3a3SEmmanuel Vadot 21c9ccf3a3SEmmanuel Vadotproperties: 22c9ccf3a3SEmmanuel Vadot compatible: 23c9ccf3a3SEmmanuel Vadot oneOf: 24fac71e4eSEmmanuel Vadot - enum: 25fac71e4eSEmmanuel Vadot - mediatek,mt8173-disp-merge 26fac71e4eSEmmanuel Vadot - mediatek,mt8195-disp-merge 27*8d13bc63SEmmanuel Vadot - mediatek,mt8195-mdp3-merge 28f126890aSEmmanuel Vadot - items: 29f126890aSEmmanuel Vadot - const: mediatek,mt6795-disp-merge 30f126890aSEmmanuel Vadot - const: mediatek,mt8173-disp-merge 31*8d13bc63SEmmanuel Vadot - items: 32*8d13bc63SEmmanuel Vadot - const: mediatek,mt8188-disp-merge 33*8d13bc63SEmmanuel Vadot - const: mediatek,mt8195-disp-merge 34c9ccf3a3SEmmanuel Vadot 35c9ccf3a3SEmmanuel Vadot reg: 36c9ccf3a3SEmmanuel Vadot maxItems: 1 37c9ccf3a3SEmmanuel Vadot 38c9ccf3a3SEmmanuel Vadot interrupts: 39c9ccf3a3SEmmanuel Vadot maxItems: 1 40c9ccf3a3SEmmanuel Vadot 41c9ccf3a3SEmmanuel Vadot power-domains: 42c9ccf3a3SEmmanuel Vadot description: A phandle and PM domain specifier as defined by bindings of 43c9ccf3a3SEmmanuel Vadot the power controller specified by phandle. See 44c9ccf3a3SEmmanuel Vadot Documentation/devicetree/bindings/power/power-domain.yaml for details. 45c9ccf3a3SEmmanuel Vadot 46c9ccf3a3SEmmanuel Vadot clocks: 47c9ccf3a3SEmmanuel Vadot minItems: 1 48c9ccf3a3SEmmanuel Vadot maxItems: 2 49c9ccf3a3SEmmanuel Vadot 50c9ccf3a3SEmmanuel Vadot clock-names: 51c9ccf3a3SEmmanuel Vadot oneOf: 52c9ccf3a3SEmmanuel Vadot - items: 53c9ccf3a3SEmmanuel Vadot - const: merge 54c9ccf3a3SEmmanuel Vadot - items: 55c9ccf3a3SEmmanuel Vadot - const: merge 56c9ccf3a3SEmmanuel Vadot - const: merge_async 57c9ccf3a3SEmmanuel Vadot 58c9ccf3a3SEmmanuel Vadot mediatek,merge-fifo-en: 59c9ccf3a3SEmmanuel Vadot description: 60c9ccf3a3SEmmanuel Vadot The setting of merge fifo is mainly provided for the display latency 61c9ccf3a3SEmmanuel Vadot buffer to ensure that the back-end panel display data will not be 62c9ccf3a3SEmmanuel Vadot underrun, a little more data is needed in the fifo. 63c9ccf3a3SEmmanuel Vadot According to the merge fifo settings, when the water level is detected 64c9ccf3a3SEmmanuel Vadot to be insufficient, it will trigger RDMA sending ultra and preulra 65c9ccf3a3SEmmanuel Vadot command to SMI to speed up the data rate. 66c9ccf3a3SEmmanuel Vadot type: boolean 67c9ccf3a3SEmmanuel Vadot 68c9ccf3a3SEmmanuel Vadot mediatek,merge-mute: 69c9ccf3a3SEmmanuel Vadot description: Support mute function. Mute the content of merge output. 70c9ccf3a3SEmmanuel Vadot type: boolean 71c9ccf3a3SEmmanuel Vadot 72c9ccf3a3SEmmanuel Vadot mediatek,gce-client-reg: 73c9ccf3a3SEmmanuel Vadot description: The register of client driver can be configured by gce with 74c9ccf3a3SEmmanuel Vadot 4 arguments defined in this property, such as phandle of gce, subsys id, 75c9ccf3a3SEmmanuel Vadot register offset and size. Each GCE subsys id is mapping to a client 76c9ccf3a3SEmmanuel Vadot defined in the header include/dt-bindings/gce/<chip>-gce.h. 77c9ccf3a3SEmmanuel Vadot $ref: /schemas/types.yaml#/definitions/phandle-array 78c9ccf3a3SEmmanuel Vadot maxItems: 1 79c9ccf3a3SEmmanuel Vadot 80c9ccf3a3SEmmanuel Vadot resets: 81c9ccf3a3SEmmanuel Vadot description: reset controller 82c9ccf3a3SEmmanuel Vadot See Documentation/devicetree/bindings/reset/reset.txt for details. 83c9ccf3a3SEmmanuel Vadot maxItems: 1 84c9ccf3a3SEmmanuel Vadot 85c9ccf3a3SEmmanuel Vadotrequired: 86c9ccf3a3SEmmanuel Vadot - compatible 87c9ccf3a3SEmmanuel Vadot - reg 88c9ccf3a3SEmmanuel Vadot - power-domains 89c9ccf3a3SEmmanuel Vadot - clocks 90c9ccf3a3SEmmanuel Vadot 91c9ccf3a3SEmmanuel VadotadditionalProperties: false 92c9ccf3a3SEmmanuel Vadot 93c9ccf3a3SEmmanuel Vadotexamples: 94c9ccf3a3SEmmanuel Vadot - | 95c9ccf3a3SEmmanuel Vadot #include <dt-bindings/interrupt-controller/arm-gic.h> 96c9ccf3a3SEmmanuel Vadot #include <dt-bindings/clock/mt8173-clk.h> 97c9ccf3a3SEmmanuel Vadot #include <dt-bindings/power/mt8173-power.h> 98c9ccf3a3SEmmanuel Vadot 99c9ccf3a3SEmmanuel Vadot soc { 100c9ccf3a3SEmmanuel Vadot #address-cells = <2>; 101c9ccf3a3SEmmanuel Vadot #size-cells = <2>; 102c9ccf3a3SEmmanuel Vadot 103c9ccf3a3SEmmanuel Vadot merge@14017000 { 104c9ccf3a3SEmmanuel Vadot compatible = "mediatek,mt8173-disp-merge"; 105c9ccf3a3SEmmanuel Vadot reg = <0 0x14017000 0 0x1000>; 106c9ccf3a3SEmmanuel Vadot power-domains = <&spm MT8173_POWER_DOMAIN_MM>; 107c9ccf3a3SEmmanuel Vadot clocks = <&mmsys CLK_MM_DISP_MERGE>; 108c9ccf3a3SEmmanuel Vadot clock-names = "merge"; 109c9ccf3a3SEmmanuel Vadot }; 110c9ccf3a3SEmmanuel Vadot }; 111