xref: /freebsd-src/sys/contrib/device-tree/Bindings/display/mediatek/mediatek,split.yaml (revision b2d2a78ad80ec68d4a17f5aef97d21686cb1e29b)
1c9ccf3a3SEmmanuel Vadot# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2c9ccf3a3SEmmanuel Vadot%YAML 1.2
3c9ccf3a3SEmmanuel Vadot---
4c9ccf3a3SEmmanuel Vadot$id: http://devicetree.org/schemas/display/mediatek/mediatek,split.yaml#
5c9ccf3a3SEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml#
6c9ccf3a3SEmmanuel Vadot
7c9ccf3a3SEmmanuel Vadottitle: Mediatek display split
8c9ccf3a3SEmmanuel Vadot
9c9ccf3a3SEmmanuel Vadotmaintainers:
10c9ccf3a3SEmmanuel Vadot  - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11c9ccf3a3SEmmanuel Vadot  - Philipp Zabel <p.zabel@pengutronix.de>
12c9ccf3a3SEmmanuel Vadot
13c9ccf3a3SEmmanuel Vadotdescription: |
14c9ccf3a3SEmmanuel Vadot  Mediatek display split, namely SPLIT, is used to split stream to two
15c9ccf3a3SEmmanuel Vadot  encoders.
16c9ccf3a3SEmmanuel Vadot  SPLIT device node must be siblings to the central MMSYS_CONFIG node.
17c9ccf3a3SEmmanuel Vadot  For a description of the MMSYS_CONFIG binding, see
18c9ccf3a3SEmmanuel Vadot  Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
19c9ccf3a3SEmmanuel Vadot  for details.
20c9ccf3a3SEmmanuel Vadot
21c9ccf3a3SEmmanuel Vadotproperties:
22c9ccf3a3SEmmanuel Vadot  compatible:
23c9ccf3a3SEmmanuel Vadot    oneOf:
24fac71e4eSEmmanuel Vadot      - enum:
25fac71e4eSEmmanuel Vadot          - mediatek,mt8173-disp-split
268d13bc63SEmmanuel Vadot          - mediatek,mt8195-mdp3-split
27f126890aSEmmanuel Vadot      - items:
28f126890aSEmmanuel Vadot          - const: mediatek,mt6795-disp-split
29f126890aSEmmanuel Vadot          - const: mediatek,mt8173-disp-split
30c9ccf3a3SEmmanuel Vadot
31c9ccf3a3SEmmanuel Vadot  reg:
32c9ccf3a3SEmmanuel Vadot    maxItems: 1
33c9ccf3a3SEmmanuel Vadot
34c9ccf3a3SEmmanuel Vadot  interrupts:
35c9ccf3a3SEmmanuel Vadot    maxItems: 1
36c9ccf3a3SEmmanuel Vadot
37c9ccf3a3SEmmanuel Vadot  power-domains:
38c9ccf3a3SEmmanuel Vadot    description: A phandle and PM domain specifier as defined by bindings of
39c9ccf3a3SEmmanuel Vadot      the power controller specified by phandle. See
40c9ccf3a3SEmmanuel Vadot      Documentation/devicetree/bindings/power/power-domain.yaml for details.
41*b2d2a78aSEmmanuel Vadot    maxItems: 1
42c9ccf3a3SEmmanuel Vadot
438d13bc63SEmmanuel Vadot  mediatek,gce-client-reg:
448d13bc63SEmmanuel Vadot    description:
458d13bc63SEmmanuel Vadot      The register of display function block to be set by gce. There are 4 arguments,
468d13bc63SEmmanuel Vadot      such as gce node, subsys id, offset and register size. The subsys id that is
478d13bc63SEmmanuel Vadot      mapping to the register of display function blocks is defined in the gce header
488d13bc63SEmmanuel Vadot      include/dt-bindings/gce/<chip>-gce.h of each chips.
498d13bc63SEmmanuel Vadot    $ref: /schemas/types.yaml#/definitions/phandle-array
508d13bc63SEmmanuel Vadot    items:
518d13bc63SEmmanuel Vadot      items:
528d13bc63SEmmanuel Vadot        - description: phandle of GCE
538d13bc63SEmmanuel Vadot        - description: GCE subsys id
548d13bc63SEmmanuel Vadot        - description: register offset
558d13bc63SEmmanuel Vadot        - description: register size
568d13bc63SEmmanuel Vadot    maxItems: 1
578d13bc63SEmmanuel Vadot
58c9ccf3a3SEmmanuel Vadot  clocks:
59c9ccf3a3SEmmanuel Vadot    items:
60c9ccf3a3SEmmanuel Vadot      - description: SPLIT Clock
61*b2d2a78aSEmmanuel Vadot      - description: Used for interfacing with the HDMI RX signal source.
62*b2d2a78aSEmmanuel Vadot      - description: Paired with receiving HDMI RX metadata.
63*b2d2a78aSEmmanuel Vadot    minItems: 1
64c9ccf3a3SEmmanuel Vadot
65c9ccf3a3SEmmanuel Vadotrequired:
66c9ccf3a3SEmmanuel Vadot  - compatible
67c9ccf3a3SEmmanuel Vadot  - reg
68c9ccf3a3SEmmanuel Vadot  - power-domains
69c9ccf3a3SEmmanuel Vadot  - clocks
70c9ccf3a3SEmmanuel Vadot
718d13bc63SEmmanuel VadotallOf:
728d13bc63SEmmanuel Vadot  - if:
738d13bc63SEmmanuel Vadot      properties:
748d13bc63SEmmanuel Vadot        compatible:
758d13bc63SEmmanuel Vadot          contains:
768d13bc63SEmmanuel Vadot            const: mediatek,mt8195-mdp3-split
778d13bc63SEmmanuel Vadot
788d13bc63SEmmanuel Vadot    then:
79*b2d2a78aSEmmanuel Vadot      properties:
80*b2d2a78aSEmmanuel Vadot        clocks:
81*b2d2a78aSEmmanuel Vadot          minItems: 3
82*b2d2a78aSEmmanuel Vadot
838d13bc63SEmmanuel Vadot      required:
848d13bc63SEmmanuel Vadot        - mediatek,gce-client-reg
858d13bc63SEmmanuel Vadot
86*b2d2a78aSEmmanuel Vadot  - if:
87*b2d2a78aSEmmanuel Vadot      properties:
88*b2d2a78aSEmmanuel Vadot        compatible:
89*b2d2a78aSEmmanuel Vadot          contains:
90*b2d2a78aSEmmanuel Vadot            const: mediatek,mt8173-disp-split
91*b2d2a78aSEmmanuel Vadot
92*b2d2a78aSEmmanuel Vadot    then:
93*b2d2a78aSEmmanuel Vadot      properties:
94*b2d2a78aSEmmanuel Vadot        clocks:
95*b2d2a78aSEmmanuel Vadot          maxItems: 1
96*b2d2a78aSEmmanuel Vadot
97c9ccf3a3SEmmanuel VadotadditionalProperties: false
98c9ccf3a3SEmmanuel Vadot
99c9ccf3a3SEmmanuel Vadotexamples:
100c9ccf3a3SEmmanuel Vadot  - |
101c9ccf3a3SEmmanuel Vadot    #include <dt-bindings/clock/mt8173-clk.h>
102c9ccf3a3SEmmanuel Vadot    #include <dt-bindings/power/mt8173-power.h>
103c9ccf3a3SEmmanuel Vadot
104c9ccf3a3SEmmanuel Vadot    soc {
105c9ccf3a3SEmmanuel Vadot        #address-cells = <2>;
106c9ccf3a3SEmmanuel Vadot        #size-cells = <2>;
107c9ccf3a3SEmmanuel Vadot
108c9ccf3a3SEmmanuel Vadot        split0: split@14018000 {
109c9ccf3a3SEmmanuel Vadot            compatible = "mediatek,mt8173-disp-split";
110c9ccf3a3SEmmanuel Vadot            reg = <0 0x14018000 0 0x1000>;
111c9ccf3a3SEmmanuel Vadot            power-domains = <&spm MT8173_POWER_DOMAIN_MM>;
112c9ccf3a3SEmmanuel Vadot            clocks = <&mmsys CLK_MM_DISP_SPLIT0>;
113c9ccf3a3SEmmanuel Vadot        };
114c9ccf3a3SEmmanuel Vadot    };
115