xref: /freebsd-src/sys/contrib/device-tree/Bindings/clock/qcom,qdu1000-ecpricc.yaml (revision 8d13bc63c0e1d50bc9e47ac1f26329c999bfecf0)
1*8d13bc63SEmmanuel Vadot# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*8d13bc63SEmmanuel Vadot%YAML 1.2
3*8d13bc63SEmmanuel Vadot---
4*8d13bc63SEmmanuel Vadot$id: http://devicetree.org/schemas/clock/qcom,qdu1000-ecpricc.yaml#
5*8d13bc63SEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml#
6*8d13bc63SEmmanuel Vadot
7*8d13bc63SEmmanuel Vadottitle: Qualcomm ECPRI Clock & Reset Controller for QDU1000 and QRU1000
8*8d13bc63SEmmanuel Vadot
9*8d13bc63SEmmanuel Vadotmaintainers:
10*8d13bc63SEmmanuel Vadot  - Taniya Das <quic_tdas@quicinc.com>
11*8d13bc63SEmmanuel Vadot  - Imran Shaik <quic_imrashai@quicinc.com>
12*8d13bc63SEmmanuel Vadot
13*8d13bc63SEmmanuel Vadotdescription: |
14*8d13bc63SEmmanuel Vadot  Qualcomm ECPRI Specification V2.0 Common Public Radio Interface clock control
15*8d13bc63SEmmanuel Vadot  module which supports the clocks, resets on QDU1000 and QRU1000
16*8d13bc63SEmmanuel Vadot
17*8d13bc63SEmmanuel Vadot  See also:: include/dt-bindings/clock/qcom,qdu1000-ecpricc.h
18*8d13bc63SEmmanuel Vadot
19*8d13bc63SEmmanuel Vadotproperties:
20*8d13bc63SEmmanuel Vadot  compatible:
21*8d13bc63SEmmanuel Vadot    enum:
22*8d13bc63SEmmanuel Vadot      - qcom,qdu1000-ecpricc
23*8d13bc63SEmmanuel Vadot
24*8d13bc63SEmmanuel Vadot  reg:
25*8d13bc63SEmmanuel Vadot    maxItems: 1
26*8d13bc63SEmmanuel Vadot
27*8d13bc63SEmmanuel Vadot  clocks:
28*8d13bc63SEmmanuel Vadot    items:
29*8d13bc63SEmmanuel Vadot      - description: Board XO source
30*8d13bc63SEmmanuel Vadot      - description: GPLL0 source from GCC
31*8d13bc63SEmmanuel Vadot      - description: GPLL1 source from GCC
32*8d13bc63SEmmanuel Vadot      - description: GPLL2 source from GCC
33*8d13bc63SEmmanuel Vadot      - description: GPLL3 source from GCC
34*8d13bc63SEmmanuel Vadot      - description: GPLL4 source from GCC
35*8d13bc63SEmmanuel Vadot      - description: GPLL5 source from GCC
36*8d13bc63SEmmanuel Vadot
37*8d13bc63SEmmanuel Vadot  '#clock-cells':
38*8d13bc63SEmmanuel Vadot    const: 1
39*8d13bc63SEmmanuel Vadot
40*8d13bc63SEmmanuel Vadot  '#reset-cells':
41*8d13bc63SEmmanuel Vadot    const: 1
42*8d13bc63SEmmanuel Vadot
43*8d13bc63SEmmanuel Vadotrequired:
44*8d13bc63SEmmanuel Vadot  - compatible
45*8d13bc63SEmmanuel Vadot  - reg
46*8d13bc63SEmmanuel Vadot  - clocks
47*8d13bc63SEmmanuel Vadot  - '#clock-cells'
48*8d13bc63SEmmanuel Vadot  - '#reset-cells'
49*8d13bc63SEmmanuel Vadot
50*8d13bc63SEmmanuel VadotadditionalProperties: false
51*8d13bc63SEmmanuel Vadot
52*8d13bc63SEmmanuel Vadotexamples:
53*8d13bc63SEmmanuel Vadot  - |
54*8d13bc63SEmmanuel Vadot    #include <dt-bindings/clock/qcom,qdu1000-gcc.h>
55*8d13bc63SEmmanuel Vadot    #include <dt-bindings/clock/qcom,rpmh.h>
56*8d13bc63SEmmanuel Vadot    clock-controller@280000 {
57*8d13bc63SEmmanuel Vadot      compatible = "qcom,qdu1000-ecpricc";
58*8d13bc63SEmmanuel Vadot      reg = <0x00280000 0x31c00>;
59*8d13bc63SEmmanuel Vadot      clocks = <&rpmhcc RPMH_CXO_CLK>,
60*8d13bc63SEmmanuel Vadot               <&gcc GCC_ECPRI_CC_GPLL0_CLK_SRC>,
61*8d13bc63SEmmanuel Vadot               <&gcc GCC_ECPRI_CC_GPLL1_EVEN_CLK_SRC>,
62*8d13bc63SEmmanuel Vadot               <&gcc GCC_ECPRI_CC_GPLL2_EVEN_CLK_SRC>,
63*8d13bc63SEmmanuel Vadot               <&gcc GCC_ECPRI_CC_GPLL3_CLK_SRC>,
64*8d13bc63SEmmanuel Vadot               <&gcc GCC_ECPRI_CC_GPLL4_CLK_SRC>,
65*8d13bc63SEmmanuel Vadot               <&gcc GCC_ECPRI_CC_GPLL5_EVEN_CLK_SRC>;
66*8d13bc63SEmmanuel Vadot      #clock-cells = <1>;
67*8d13bc63SEmmanuel Vadot      #reset-cells = <1>;
68*8d13bc63SEmmanuel Vadot    };
69